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HEF4011B-Q100

nexperia

Quad 2-input NAND gate

HEF4011B-Q100 Quad 2-input NAND gate Rev. 1 — 26 June 2013 Product data sheet 1. General description The HEF4011B-Q10...


nexperia

HEF4011B-Q100

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Description
HEF4011B-Q100 Quad 2-input NAND gate Rev. 1 — 26 June 2013 Product data sheet 1. General description The HEF4011B-Q100 is a quad 2-input NAND gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Fully static operation  5 V, 10 V, and 15 V parametric ratings  Standardized symmetrical output characteristics  ESD protection:  MIL-STD-833, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C Type number Package Name Description HEF4011BT-Q100 SO14 plastic small outline package; 14 leads; body width 3.9 mm Version SOT108-1 Nexperia 4. Functional diagram HEF4011B-Q100 Quad 2-input NAND gate 1A 1 1B 2 2A 5 2B 6 3A 8 3B 9 4A 12 4B 13 3 1Y 4 2Y 10 3Y 11 4Y 001aan874 Fig 1. Functional diagram 5. Pinning information 5.1 Pinning nA nB n...




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