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HEF4050B-Q100

Part Number	HEF4050B-Q100
Manufacturer	nexperia
Description	Hex non-inverting buffers
Published	Jul 29, 2019
Detailed Description	HEF4050B-Q100 Hex non-inverting buffers Rev. 2 — 15 June 2016 Product data sheet 1. General description The HEF4050B-Q...
Datasheet	HEF4050B-Q100 PDF File

Overview

HEF4050B-Q100 Hex non-inverting buffers Rev.
2 — 15 June 2016 Product data sheet 1.
General description The HEF4050B-Q100 provides six non-inverting buffers with high current output capability suitable for driving TTL or high capacitive loads.
Voltages in excess of the buffer supply voltage are permitted.
This feature allows the buffers to be used to convert logic levels of up to 15 V to standard TTL levels.
Their guaranteed fan-out into common bipolar logic elements is shown in Table 3.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground).
Unused inputs must be connected to VDD, VSS, or another input.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications.
2.
Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 3)  Specified from 40 C to +85 C  Accepts input voltages in excess of the supply voltage  Fully static operation  5 V, 10 V, and 15 V parametric ratings  Standardized symmetrical output characteristics  ESD protection:  MIL-STD-883, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  Complies with JEDEC standard JESD 13-B 3.
Applications  LOCMOS (Local Oxidation CMOS) to DTL/TTL converter  HIGH sink current for driving two TTL loads  HIGH-to-LOW level logic conversion Nexperia HEF4050B-Q100 Hex non-inverting buffers 4.
Ordering information Table 1.
Ordering information All types operate from 40 C to +85 C.
Type number Package Name Description HEF4050BT-Q100 SO16 plastic small outline package; 16 leads; body width 3.
9 mm 5.
Functional diagram Version SOT109-1 $ < $ < $ < $ < $ < $ < DDH Fig 1.
Logic symbol LQSXW $ < DDH 966 DDH Fig 2.
Logic diagram for one gate Fig 3.
Input protection circuit 6.
Pinning...

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HEF4050B-Q100 Hex non-inverting buffers - nexperia

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