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54AC11109

Part Number	54AC11109
Manufacturer	Texas Instruments
Description	Dual J-K Positive-edge-Triggered Flip-Flops
Published	Aug 18, 2019
Detailed Description	ăą 54AC11109, 74AC11109 DUAL JĆK POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCAS450 − MARCH 1987 − REVISED...
Datasheet	54AC11109 PDF File

Overview

ăą 54AC11109, 74AC11109 DUAL JĆK POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCAS450 − MARCH 1987 − REVISED APRIL 1993 • Flow-Through Architecture Optimizes PCB Layout • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise • EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process • 500-mA Typical Latch-Up Immunity at 125°C • ESD Protection Exceeds 2000 V, MIL STD-883C Method 3015 • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs 54AC11109 .
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J PACKAGE 74AC11109 .
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D OR N PACKAGE (TOP VIEW) 1PRE 1Q 1Q GND 2Q 2Q 2PRE 2CLK 1 2 3 4 5 6 7 8 16 1CLK 15 1K 14 1J 13 1CLR 12 VCC ...

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