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PF8200

NXP
Part Number PF8200
Manufacturer NXP
Description 12-channel power management
Published Aug 29, 2019
Detailed Description PF8100; PF8200 12-channel power management integrated circuit for high performance applications Rev. 11 — 24 February...
Datasheet PDF File PF8200 PDF File

PF8200
PF8200


Overview
PF8100; PF8200 12-channel power management integrated circuit for high performance applications Rev.
11 — 24 February 2021 Product data sheet 1 Overview The PF8100/PF8200 is a power management integrated circuit (PMIC) designed for high performance i.
MX 8 and S32x based applications.
It features seven high efficiency buck converters and four linear regulators for powering the processor, memory and miscellaneous peripherals.
Built-in one time programmable memory stores key startup configurations, drastically reducing external components typically used to set output voltage and sequence of external regulators.
Regulator parameters are adjustable through high-speed I2C after start up offering flexibility for different system states.
2 Features • Up to seven high efficiency buck converters • Four linear regulators with load switch options • RTC supply and coin cell charger • Watchdog timer/monitor • Monitoring circuit to fit ASIL B safety level • One time programmable device configuration • 3.
4 MHz I2C communication interface • 56-pin 8 x 8 QFN package NXP Semiconductors PF8100; PF8200 12-channel power management integrated circuit for high performance applications 3 Simplified application diagram VIN: 2.
7 V to 5.
5 V PF8x00 VSNVS VDD_SNVS IMX8QXP BUCK1 BUCK2 VDD_MAIN VDD_MEMC BUCK3 VDD_GPU BUCK4 VDD_CPU (A35) BUCK5 VDD_DDRIO BUCK6 BUCK7 1.
8 V I/O (LV GPIO) 3.
3 V I/O (HV GPIO) LDO1 VDD_SCU LDO2 SDCARD0 LDO3 2.
5 V I/O LDO4 CONTROL SIGNALS MISC INTERFACING AND I2C COMMUNICATIONS I2C DRAM LPDDR Memory SIMCARD SD Card eMMC Supply Ethernet MISCELLANEOUS PERIPHERALS Figure 1.
 Simplified application diagram VIN: 2.
7 V to 5.
5 V PF8x00 VSNVS VDD_SNVS IMX8QM PF8x00 VSNVS BUCK1 BUCK2 BUCK3 BUCK4 VDD_MAIN GPU0 CPU1 (A72) GPU1 BUCK1 BUCK2 BUCK3 BUCK4 VIN: 2.
7 V to 5.
5 V BUCK5 CPU0 (A53) VDD_MEMC BUCK5 BUCK6 VDD_DDRIO0 VDD_DDRIO1 BUCK6 BUCK7 1.
8 V I/O 3.
3 V I/O BUCK7 LDO1 LDO2 LDO3 LDO4 CONTROL SIGNALS I2C DRAM LPDDR_0 Memory...



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