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TPS3123J18

Texas Instruments
Part Number TPS3123J18
Manufacturer Texas Instruments
Description ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS
Published Sep 25, 2019
Detailed Description TPS3123J12, TPS3123G15, TPS3123J18, TPS3124J12, TPS3124G15 TPS3124J18, TPS3125J12, TPS3125G15, TPS3125J18, TPS3125L30 UL...
Datasheet PDF File TPS3123J18 PDF File

TPS3123J18
TPS3123J18

Overview
TPS3123J12, TPS3123G15, TPS3123J18, TPS3124J12, TPS3124G15 TPS3124J18, TPS3125J12, TPS3125G15, TPS3125J18, TPS3125L30 ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS SLVS227 – AUGUST 1999 features D Minimum Supply Voltage of 0.
75 V D Supply Voltage Supervision Range: – 1.
2 V, 1.
5 V, 1.
8 V (TPS3123, TPS3124, TPS3125) – 3 V (TPS3125 Devices only) D Power-On Reset Generator With Fixed Delay Time of 180 ms D Manual Reset Input (TPS3123 and TPS3125) D Watchdog Timer Retriggers the RESET Output at VDD ≥ VIT D Supply Current of 14 µA (Typ) D SOT23–5 Package D Temperature Range .
.
.
– 40°C to 85°C typical applications D Applications Using Low Voltage DSPs, Microcontrollers or Microprocessors D Wireless Communication Systems D Portable/Battery-Powered Equipment D Programmable Controls D Intelligent Instruments D Industrial Equipment D Notebook/Desktop Computers D Automotive Systems DBV PACKAGE (TOP VIEW) 2.
5 V 1.
2 V RESET GND 15 TPS3123 2 VDD VDD MR TPS3125J12 GND RESET CVDD DVDD TMS320UVC5402 MR RESET GND RESET 34 15 TPS3124 2 34 WDI VDD WDI MR WDI VDD RESET TPS3823-25 GND XF RESET GND RESET GND RESET 15 TPS3125 2 34 VDD MR Figure 1.
Typical Dual-Voltage DSP Application description The TPS3123, TPS3124, TPS3125 family of ultra-low voltage processor supervisory circuits provides circuit initialization and timing supervision, primarily for DSP and processor-based systems.
During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 0.
75 V.
Thereafter, the supply voltage supervisor monitors VDD and keeps RESET output active as long as VDD remains below the threshold voltage VIT.
An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset.
The delay time, tdtyp = 180 ms starts after VDD has risen above the threshold voltage VIT.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor produc...


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