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LTC2000A

Analog Devices
Part Number LTC2000A
Manufacturer Analog Devices
Description 16-/14-/11-Bit 2.7Gsps DACs
Published Nov 12, 2019
Detailed Description FEATURES n 80dBc SFDR at 50MHz fOUT n >68dBc SFDR from DC to 1080MHz fOUT n 40mA Nominal Full-Scale, ±1V Output Complian...
Datasheet PDF File LTC2000A PDF File

LTC2000A
LTC2000A

Overview
FEATURES n 80dBc SFDR at 50MHz fOUT n >68dBc SFDR from DC to 1080MHz fOUT n 40mA Nominal Full-Scale, ±1V Output Compliant n 10mA to 60mA Adjustable Full-Scale Current Range n Single or Dual Port DDR LVDS and DHSTL Interface n Low Latency (7.
5 Cycles for Single Port, 11 Cycles for Dual Port) n >78dBc 2-Tone IMD from DC to 1000MHz fOUT n –156dBc/Hz Additive Phase Noise at 1MHz Offset for 65MHz fOUT n 170-Lead (9mm × 15mm) BGA Package APPLICATIONS n Broadband Communication Systems n DOCSIS CMTS n Direct RF Synthesis n Radar n Instrumentation n Automatic Test Equipment LTC2000A 16-/14-/11-Bit 2.
7Gsps DACs DESCRIPTION The LTC®2000A is a family of 16-/14-/11-bit 2.
7Gsps current steering DACs with exceptional spectral purity.
The single (1.
35Gsps mode) or dual (2.
7Gsps mode) port source synchronous LVDS interface supports data rates of up to 1.
35Gbps using a 675MHz DDR data clock, which can be either in quadrature or in phase with the data.
An internal synchronizer automatically aligns the data with the DAC sample clock.
Additional features such as pattern generation, LVDS loopout and junction temperature sensing simplify system development and testing.
A serial peripheral interface (SPI) port allows configuration and read back of internal registers.
Operating from 1.
86V and 3.
3V supplies, the LTC2000A consumes 2.
41W at 2.
7Gsps and 1.
43W at 1.
35Gsps.
All registered trademarks and trademarks are the property of their respective owners.
Protected by U.
S.
Patents, including 8330633.
LVDS RECEIVERS DDR DATA FLIP-FLOPS SFDR (dBc) BLOCK DIAGRAM TSTP/N JUNCTION TEMPERATURE PATTERN GENERATOR PD CS SCK SDI SDO SPI SVDD DAP/N[15:0] DBP/N[15:0] 4:1 16-BIT DAC IOUTP 50Ω 50Ω IOUTN DCKIP/N DCKOP/N AVDD18 DELAY ADJUST CLK DIVIDER ÷2 OR ÷4 DVDD18 AVDD33 CLOCK SYNC DVDD33 GND GAIN ADJUST CLK RECEIVER CKP/N 10k REF FSADJ REFIO 2000A BD For more information www.
linear.
com/LTC2000A SFDR vs fOUT, fDAC = 2.
7Gsps 100 DIGITAL AMPLITUDE = 0dBFS IOUTFS = 40mA 90 80 70 60 5...


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