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8S89296

Part Number	8S89296
Manufacturer	Renesas
Description	LVDS Programmable Delay Line
Published	Jan 19, 2020
Detailed Description	LVDS Programmable Delay Line 8S89296 Datasheet Description The 8S89296 is a high performance LVDS programmable delay l...
Datasheet	8S89296 PDF File

Overview

LVDS Programmable Delay Line 8S89296 Datasheet Description The 8S89296 is a high performance LVDS programmable delay line.
The delay can vary from 2.
2ns to 12.
5ns in 10ps steps.
The 8S89296 is characterized to operate from a 2.
5V power supply and is guaranteed over industrial temperature range.
The delay of the device varies in discrete steps based on a control word.
A 10-bit long control word sets the delay in 10ps increments.
Also, the input pins IN and nIN default to an equivalent low state when left floating.
The control register can accept CMOS or TTL level signals.
Block Diagram Figure 1: Block Diagram Features ▪ One LVDS level output ▪ One differential clock input pair ▪ Differential input clock (IN, nIN) can accept the following signaling levels: LVPECL, LVDS, CML ▪ Maximum frequency: 800MHz ▪ Programmable Delay Range: 2.
2ns to 12.
5ns in 10ps steps ▪ D[10:0] can accept LVPECL, LVCMOS or LVTTL levels ▪ Full 2.
5V supply voltages ▪ -40°C to 85°C ambient operating temperature ▪ ...

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8S89296 LVDS Programmable Delay Line - Renesas

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