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MC9S08PA16

NXP
Part Number MC9S08PA16
Manufacturer NXP
Description CPU
Published Jan 22, 2020
Detailed Description NXP Semiconductors Data Sheet: Technical Data MC9S08PA16 Series Data Sheet Supports: MC9S08PA16(A) and MC9S08PA8(A) Key ...
Datasheet PDF File MC9S08PA16 PDF File

MC9S08PA16
MC9S08PA16

Overview
NXP Semiconductors Data Sheet: Technical Data MC9S08PA16 Series Data Sheet Supports: MC9S08PA16(A) and MC9S08PA8(A) Key features • 8-Bit S08 central processor unit (CPU) – Up to 20 MHz bus at 2.
7 V to 5.
5 V across operating temperature range of -40 °C to 105 °C for V part and -40 °C to 125 °C for M part.
– Supporting up to 40 interrupt/reset sources – Supporting up to four-level nested interrupt – On-chip memory – Up to 16 KB flash read/program/erase over full operating voltage and temperature – Up to 256 byte EEPROM; 2-byte erase sector; program and erase while executing flash – Up to 2048 byte random-access memory (RAM) – Flash and RAM access protection • Power-saving modes – One low-power stop mode; reduced power wait mode – Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode • Clocks – Oscillator (XOSC) - loop-controlled Pierce oscillator; crystal or ceramic resonator range of 31.
25 kHz to 39.
0625 kHz or 4 MHz to 20 MHz – Internal clock source (ICS) - containing a frequencylocked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allowing 1% deviation across temperature range of 0 °C to 70 °C and 2% deviation across the whole operating temperature; up to 20 MHz • System protection – Watchdog with independent clock source – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset Document Number MC9S08PA16 Rev.
4, 03/2020 MC9S08PA16 MC9S08PA16A and MC9S08PA8A are recommended for new design • Development support – Single-wire background debug interface – Breakpoint capability to allow three breakpoints setting during in-circuit debugging – On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes • Peripherals – ACMP - one analog comparator with both positive and negative inputs; sepa...


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