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SN74HC02


Part Number SN74HC02
Manufacturer Texas Instruments
Title Quadruple 2-Input Positive-NOR Gates
Description This device contains four independent 2-input NOR gates. Each gate performs the Boolean function Y = A + B in positive logic. Device Information ...
Features
• Buffered inputs
• Wide operating voltage range: 2 V to 6 V
• Wide operating temperature range:
  –40°C to +85°C
• Supports fanout up to 10 LSTTL loads
• Significant power reduction compared to LSTTL logic ICs 2 Applications
• Alarm / tamper detect circuit
• S-R latch 3 Description This device conta...

File Size 1.30MB
Datasheet SN74HC02 PDF File








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SN74HC00 : This device contains four independent 2-input NAND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC00D SOIC (14) 8.70 mm × 3.90 mm SN74HC00DB SSOP (14) 6.50 mm × 5.30 mm SN74HC00N PDIP (14) 19.30 mm × 6.40 mm SN74HC00NS SO (14) 10.20 mm × 5.30 mm SN74HC00PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC00FK LCCC (20) 8.90 mm × 8.90 mm SN54HC00J CDIP (14) 21.30 mm × 7.60 mm SN54HC00W CFP (14) 9.20 mm × 6.29 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 .

SN74HC00-Q1 : ordering information The SN74HC00 device contains four independent 2-input NAND gates. It performs the Boolean function Y = A • B or Y = A + B in positive logic. ORDERING INFORMATION{ TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 125°C SOIC − D TSSOP − PW Reel of 2500 Reel of 2000 SN74HC00QDRQ1 SN74HC00QPWRQ1 HC00Q HC00Q † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. FUNCTION TABLE (each gate) INPUTS AB OUTPUT Y HH L LX H XL H logic diagram (posi.

SN74HC00D : This device contains four independent 2-input NAND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC00D SOIC (14) 8.70 mm × 3.90 mm SN74HC00DB SSOP (14) 6.50 mm × 5.30 mm SN74HC00N PDIP (14) 19.30 mm × 6.40 mm SN74HC00NS SO (14) 10.20 mm × 5.30 mm SN74HC00PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC00FK LCCC (20) 8.90 mm × 8.90 mm SN54HC00J CDIP (14) 21.30 mm × 7.60 mm SN54HC00W CFP (14) 9.20 mm × 6.29 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 .

SN74HC00N : This device contains four independent 2-input NAND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC00D SOIC (14) 8.70 mm × 3.90 mm SN74HC00DB SSOP (14) 6.50 mm × 5.30 mm SN74HC00N PDIP (14) 19.30 mm × 6.40 mm SN74HC00NS SO (14) 10.20 mm × 5.30 mm SN74HC00PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC00FK LCCC (20) 8.90 mm × 8.90 mm SN54HC00J CDIP (14) 21.30 mm × 7.60 mm SN54HC00W CFP (14) 9.20 mm × 6.29 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 .

SN74HC02-EP : ordering information The SN74HC02 contains four independent 2-input NOR gates. It performs the Boolean function Y = A + B or Y = A • B in positive logic. ORDERING INFORMATION TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 125°C TSSOP − PW Tape and reel SN74HC02QPWREP SHC02EP −55°C to 125°C SOIC − D Tape and reel SN74HC02MDREP HC02MEP ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS AB OUTPUT Y HX L XH L LL H logic diagram (positive logic) A B Y Please be aware that an important notice concerning availability, standard warranty,.

SN74HC02-Q1 : ordering information The ’HC02 device contains four independent 2-input NOR gates. They perform the Boolean function Y = A + B or Y = A • B in positive logic. SCLS530A − AUGUST 2003 − REVISED 2008 D Typical tpd = 8 ns D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max D OR PW PACKAGE (TOP VIEW) 1Y 1A 1B 2Y 2A 2B GND 1 2 3 4 5 6 7 14 VCC 13 4Y 12 4B 11 4A 10 3Y 9 3B 8 3A ORDERING INFORMATION{ TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC − D −40°C to 125°C TSSOP − PW Tape and reel Tape and reel SN74HC02QDRQ1 SN74HC02QPWRQ1 HC02QQ1 HC02QQ1 † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or se.

SN74HC02D : This device contains four independent 2-input NOR gates. Each gate performs the Boolean function Y = A + B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC02D SOIC (14) 8.65 mm × 3.90 mm SN74HC02DB SSOP (14) 6.20 mm × 5.30 mm SN74HC02N PDIP (14) 19.30 mm × 6.40 mm SN74HC02NS SO (14) 10.20 mm × 5.30 mm SN74HC02PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC02J CDIP (14) 19.94 mm × 7.62 mm SN54HC02W CDIP (14) 9.20 mm × 6.29 mm SN54HC02FK LCCC (20) 8.89 mm × 8.89 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7 14 VCC 13 4Y 12 4B 11 4A 10 .

SN74HC02N : This device contains four independent 2-input NOR gates. Each gate performs the Boolean function Y = A + B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC02D SOIC (14) 8.65 mm × 3.90 mm SN74HC02DB SSOP (14) 6.20 mm × 5.30 mm SN74HC02N PDIP (14) 19.30 mm × 6.40 mm SN74HC02NS SO (14) 10.20 mm × 5.30 mm SN74HC02PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC02J CDIP (14) 19.94 mm × 7.62 mm SN54HC02W CDIP (14) 9.20 mm × 6.29 mm SN54HC02FK LCCC (20) 8.89 mm × 8.89 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7 14 VCC 13 4Y 12 4B 11 4A 10 .

SN74HC03 : This device contains four independent 2-input NAND Gates with open-drain outputs. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC03N PDIP (14) 19.30 mm × 6.40 mm SN74HC03NS SO (14) 10.20 mm × 5.30 mm SN74HC03D SOIC (14) 8.70 mm × 3.90 mm SN74HC03PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC03J CDIP (14) 21.30 mm × 7.60 mm SN54HC03FK LCCC (20) 8.9 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y Functional pinout of the SN74HC03 Copyri.

SN74HC03D : This device contains four independent 2-input NAND Gates with open-drain outputs. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC03N PDIP (14) 19.30 mm × 6.40 mm SN74HC03NS SO (14) 10.20 mm × 5.30 mm SN74HC03D SOIC (14) 8.70 mm × 3.90 mm SN74HC03PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC03J CDIP (14) 21.30 mm × 7.60 mm SN54HC03FK LCCC (20) 8.9 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y Functional pinout of the SN74HC03 Copyri.

SN74HC03N : This device contains four independent 2-input NAND Gates with open-drain outputs. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC03N PDIP (14) 19.30 mm × 6.40 mm SN74HC03NS SO (14) 10.20 mm × 5.30 mm SN74HC03D SOIC (14) 8.70 mm × 3.90 mm SN74HC03PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC03J CDIP (14) 21.30 mm × 7.60 mm SN54HC03FK LCCC (20) 8.9 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y Functional pinout of the SN74HC03 Copyri.

SN74HC04 : .

SN74HC04-Q1 : ordering information The SN74HC04 device contains six independent inverters. It performs the Boolean function Y = A in positive logic. ORDERING INFORMATION{ TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 85°C TSSOP − PW Tape and reel SN74HC04IPWRQ1 HC04I −40°C to 125°C TSSOP − PW Tape and reel SN74HC04QPWRQ1 HC04Q † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. FUNCTION TABLE (each inverter) INPUT A OUTPUT Y HL LH logic diagram (positive logic) AY P.

SN74HC04D : .

SN74HC04N : .

SN74HC05 : This device contains six independent inverters with open-drain outputs. Each gate performs the Boolean function Y = A in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC05DR SOIC (14) 8.70 mm × 3.90 mm SN74HC05NR PDIP (14) 19.30 mm × 6.40 mm SN74HC05NSR SO (14) 10.20 mm × 5.30 mm SN74HC05PWR TSSOP (14) 5.00 mm × 4.40 mm SN54HC05JR CDIP (14) 21.30 mm × 7.60 mm SN54HC05FKR LCCC (20) 8.90 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 GND 7 14 VCC 13 6A 12 6Y 11 5A 10 5Y 9 4A 8 4Y Functional pinout CopyrighAtn©I2M0P21OTReTxaAsN.




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