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PIC18LF24K42

Microchip
Part Number PIC18LF24K42
Manufacturer Microchip
Description High-Performance Microcontrollers
Published Feb 5, 2020
Detailed Description PIC18(L)F26/27/45/46/47/55/56/57K42 28/40/44/48-Pin, Low-Power High-Performance Microcontrollers with XLP Technology De...
Datasheet PDF File PIC18LF24K42 PDF File

PIC18LF24K42
PIC18LF24K42

Overview
PIC18(L)F26/27/45/46/47/55/56/57K42 28/40/44/48-Pin, Low-Power High-Performance Microcontrollers with XLP Technology Description The PIC18(L)F26/27/45/46/47/55/56/57K42 microcontrollers are available in 28/40/44/48-pin devices.
These devices feature a 12-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with support for Asynchronous, DMX, DALI and LIN transmissions, SPI, I2C, memory features like Memory Access Partition (MAP) to support customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory calibration values to help improve temperature sensor accuracy.
Core Features • C Compiler Optimized RISC Architecture • Operating Speed: - Up to 64 MHz clock input - 62.
5 ns minimum instruction cycle • Two Direct Memory Access (DMA) Controllers - Data transfers to SFR/GPR spaces from either Program Flash Memory, Data EEPROM or SFR/GPR spaces - User-programmable source and destination sizes - Hardware and software-triggered data transfers • System Bus Arbiter with User-Configurable Priorities for Scanner and DMA1/DMA2 with respect to the main line and interrupt execution • Vectored Interrupt Capability - Selectable high/low priority - Fixed interrupt latency - Programmable vector table base address • 31-Level Deep Hardware Stack • Low-Current Power-on Reset (POR) • Configurable Power-up Timer (PWRT) • Brown-Out Reset (BOR) • Low-Power BOR (LPBOR) Option • Windowed Watchdog Timer (WWDT) - Variable prescaler selection - Variable window size selection - Configurable in hardware or software Memory • Up to 128 KB Flash Program Memory • Up to 8 KB Data SRAM Memory • Up to 1 KB Data EEPROM • Memory Access Partition (MAP) - Configurable boot and app reg...


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