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DS32EL0124

Texas Instruments
Part Number DS32EL0124
Manufacturer Texas Instruments
Description FPGA-Link Deserializer
Published Mar 26, 2020
Detailed Description DS32EL0124, DS32ELX0124 www.ti.com SNLS284K – MAY 2008 – REVISED APRIL 2013 DS32EL0124 , DS32ELX0124 125 MHz - 312.5 ...
Datasheet PDF File DS32EL0124 PDF File

DS32EL0124
DS32EL0124

Overview
DS32EL0124, DS32ELX0124 www.
ti.
com SNLS284K – MAY 2008 – REVISED APRIL 2013 DS32EL0124 , DS32ELX0124 125 MHz - 312.
5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface Check for Samples: DS32EL0124, DS32ELX0124 FEATURES 1 •2 5-bit DDR LVDS Parallel Data Interface • Programmable Receive Equalization • Selectable DC-Balance Decoder • Selectable De-Scrambler • Remote Sense for Automatic Detection and Negotiation of Link Status • No External Receiver Reference Clock Required • LVDS Parallel Interface • Programmable LVDS Output Clock Delay • Supports Output Data-Valid Signaling • Supports Keep-Alive Clock Output • On Chip LC VCOs • Redundant Serial Input (ELX device only) • Retimed Serial Output (ELX device only) • Configurable PLL Loop Bandwidth • Configurable via SMBus • Loss of Lock and Error Reporting • 48-pin WQFN Package with Exposed DAP APPLICATIONS • Imaging: Industrial, Medical Security, Printers • Displays: LED Walls, Commercial • Video Transport • Communication Systems • Test and Measurement • Industrial Bus KEY SPECIFICATIONS • 1.
25 to 3.
125 Gbps Serial Data Rate • 125 to 312.
5 MHz DDR Parallel Clock • -40° to +85°C Temperature Range • > 8 kV ESD (HBM) Protection • 0.
5 UI Minimum Input Jitter Tolerance (1.
25 Gbps) DESCRIPTION The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and optical fiber.
This easy-to-use chipset integrates advanced signal and clock conditioning functions, with an FPGA friendly interface.
The DS32EL0124/DS32ELX0124 deserializes up to 3.
125 Gbps of high speed serial data to 5 LVDS outputs without the need for an external reference clock.
With DC-balance decoding enabled, the application payload of 2.
5 Gbps is deserialized to 4 LVDS outputs.
The DS32EL0124/DS32ELX01214 deserializers feature a remote sense capability to automatically signal link status conditions to its companion DS32EL0421/ELX0421 serializers w...


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