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70V05S

Renesas
Part Number 70V05S
Manufacturer Renesas
Description DUAL-PORT STATIC RAM
Published May 8, 2020
Detailed Description HIGH-SPEED 3.3V 8K x 8 DUAL-PORT STATIC RAM 70V05S/L Features ◆ True Dual-Ported memory cells which allow simultaneous...
Datasheet PDF File 70V05S PDF File

70V05S
70V05S

Overview
HIGH-SPEED 3.
3V 8K x 8 DUAL-PORT STATIC RAM 70V05S/L Features ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location ◆ High-speed access – Commercial: 15ns (max.
) – Industrial: 20ns (max.
) ◆ Low-power operation – IDT70V05L Active: 380mW (typ.
) Standby: 660μW (typ.
) ◆ IDT70V05 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device ◆ M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave ◆ Interrupt Flag ◆ On-chip port arbitration logic ◆ Full on-chip hardware support of semaphore signaling between ports ◆ Fully asynchronous operation from either port ◆ TTL-compatible, single 3.
3V (±0.
3V) power supply ◆ Available in 68-pin PLCC and a 64-pin TQFP ◆ Industrial temperature range (-40°C to +85°C) is available for selected speeds ◆ Green parts available, see ordering information Functional Block Diagram OEL CEL R/WL OER CER R/WR I/O0L- I/O7L BUSYL(1,2) A12L A0L I/O Control I/O Control Address Decoder CEL OEL R/WL 13 MEMORY ARRAY ARBITRATION INTERRUPT SEMAPHORE LOGIC 13 SEML INTL(2) NOTES: 1.
(MASTER): BUSY is output; (SLAVE): BUSY is input.
2.
BUSY outputs and INT outputs are non-tri-stated push-pull.
M/S Address Decoder CER OER R/WR 1 , I/O0R-I/O7R BUSYR(1,2) A12R A0R SEMR INTR(2) 2942 drw 01 JUNE 2019 DSC 2941/12 70V05L High-Speed 3.
3V 8K x 8 Dual-Port Static RAM Description The IDT70V05 is a high-speed 8K x 8 Dual-Port Static RAM.
The IDT70V05 is designed to be used as a stand-alone 64K-bit Dual-Port SRAM or as a combination MASTER/SLAVE Dual-Port SRAM for 16-bitor-morewordsystems.
UsingtheIDTMASTER/SLAVEDual-PortSRAM approach in 16-bit or wider memory system applications results in fullspeed, error-free operation without the need for additional discrete logic.
This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for Industrial and Commercial Temperature Ran...


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