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MC9S08PB16

NXP
Part Number MC9S08PB16
Manufacturer NXP
Description CPU
Published May 14, 2020
Detailed Description NXP Semiconductors Data Sheet: Technical Data MC9S08PB16 Data Sheet Supports: MC9S08PB16 and MC9S08PB8 Key features • 8-...
Datasheet PDF File MC9S08PB16 PDF File

MC9S08PB16
MC9S08PB16

Overview
NXP Semiconductors Data Sheet: Technical Data MC9S08PB16 Data Sheet Supports: MC9S08PB16 and MC9S08PB8 Key features • 8-Bit S08 central processor unit (CPU) – Up to 20 MHz bus at 2.
7 V to 5.
5 V across operating temperature range – Supporting up to 30 interrupt/reset sources – Supporting up to four-level nested interrupt – On-chip memory – Up to 16 KB flash read/program/erase over full operating voltage and temperature – Up to 1 KB random-access memory (RAM) – Flash and RAM access protection • Power-saving modes – One low power stop mode; reduced power wait mode – Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode • Clocks – Internal Clock Source (ICS) — Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allows 0.
2% resolution; 1% deviation across temperature range of 0 ºC to 70ºC, 1.
5% deviation across temperature range of –40 ºC to 105 ºC and 2% deviation across temperature range of –40 ºC to 125 ºC; Up to 20 MHz – Oscillator (XOSC) — Loop-controlled Pierce oscillator; crystal or ceramic resonator range of 31.
25 kHz to 39.
0625 kHz or 4 MHz to 20 MHz • System protection – Watchdog with independent clock source – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset Document Number MC9S08PB16 Rev.
2.
1, 11/2019 MC9S08PB16 • Peripherals – ADC - 12-channel, 12-bit resolution; 2.
5 µs conversion time; eight-level data FIFO with optional watermark; automatic compare function; 1.
7 mV/ºC temperature sensor; internal bandgap reference channel; operation in stop; optional hardware trigger – FTM - Two flex timer modulators (FTM) modules including one 6-channel (FTM2) and one 2-channel (FTM0) backward compatible with TPM modules; 16-bit counter; each channel can be configured...


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