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C8051F206

Silicon Laboratories
Part Number C8051F206
Manufacturer Silicon Laboratories
Description Mixed-Signal 8KB ISP FLASH MCU
Published May 25, 2020
Detailed Description C8051F206 C8051F220/1/6 C8051F230/1/6 Mixed-Signal 8KB ISP FLASH MCU Family ANALOG PERIPHERALS - SAR ADC • 12-bit Resol...
Datasheet PDF File C8051F206 PDF File

C8051F206
C8051F206

Overview
C8051F206 C8051F220/1/6 C8051F230/1/6 Mixed-Signal 8KB ISP FLASH MCU Family ANALOG PERIPHERALS - SAR ADC • 12-bit Resolution (‘F206) • 8-Bit Resolution (‘F220/1/6) • ±1/4 LSB INL (8-bit) and ±2 LSB INL (12-bit) • Up to 100ksps • Up to 32 Channel Input Multiplexer; Each Port I/O Pin can be an ADC Input - Two Comparators • 16 Programmable Hysteresis States • Configurable to Generate Interrupts or Reset - VDD Monitor and Brown-out Detector ON-CHIP JTAG DEBUG - On-Chip Debug Circuitry Facilitates Full Speed, Nonintrusive In-system Debug (No Emulator Required!) - Provides Breakpoints, Single-Stepping, Watchpoints, Stack Monitor - Inspect/Modify Memory and Registers - Superior Performance to Emulation Systems Using ICE-Chips, Target Pods, and Sockets - Complete, Low Cost Development Kit.
HIGH SPEED 8051 µC Core - Pipelined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25MHz Clock - Expanded Interrupt Handler MEMORY - 256 Bytes Internal Data RAM - 1024 Bytes XRAM (available on ‘F206/226/236) - 8k Bytes FLASH; In-System Programmable in 512 byte Sectors DIGITAL PERIPHERALS - Four byte wide Port I/O; All are 5V tolerant - Hardware UART and SPI bus - 3 General Purpose 16-Bit Counter/Timers - Dedicated Watch-Dog Timer - Bi-directional Reset - System Clock: Internal Programmable Oscillator, External Crystal, External RC, or External Clock SUPPLY VOLTAGE .
2.
7V to 3.
6V - Typical Operating Current: 10mA @ 25MHz - Multiple Power Saving Sleep and Shutdown Modes (48-Pin TQFP and 32-Pin LQFP Version Available) Temperature Range: –40°C to +85°C AMUX Digital MUX Port 3 Port 2 Port 1 Port 0 ANALOG PERIPHERALS SAR PGA ADC DIGITAL I/O SPI Bus UART Timer 0 ++ -- VOLTAGE COMPARATORS Timer 1 Timer 2 HIGH-SPEED CONTROLLER CORE 8051 CPU (25MIPS) CLOCK CIRCUIT JTAG EMULATION CIRCUITRY 8K x 8 1280 x 8 ISP FLASH SRAM 22 INTERRUPTS SANITY CONTROL Rev.
1.
4 11/03 Copyright © 2003 by Silicon Laboratories ...


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