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9DBV0731

Renesas
Part Number 9DBV0731
Manufacturer Renesas
Description 5 to 9-Output 1.8V Low-Power Buffers
Published Jun 4, 2020
Detailed Description 5 to 9-Output 1.8V Low-Power Buffers for PCIe Gen1–5 9DBV05x1/9DBV07x1/ 9DBV09x1 Datasheet Description The 9DBV05x1/9D...
Datasheet PDF File 9DBV0731 PDF File

9DBV0731
9DBV0731

Overview
5 to 9-Output 1.
8V Low-Power Buffers for PCIe Gen1–5 9DBV05x1/9DBV07x1/ 9DBV09x1 Datasheet Description The 9DBV05x1/9DBV07x1/9DBV09x1 fanout buffers are low-power, high-performance fanout buffers in Renesas' Full Featured PCIe family.
The buffers have 5, 7 or 9 outputs with each output having an OE# to support the PCIe CLKREQ# function.
The devices have 3 selectable SMBus addresses.
PCIe Clocking Architectures ▪ Common Clocked (CC) ▪ Independent Reference (IR) with and without spread spectrum (SRIS, SRNS) Typical Applications ▪ Servers/High-performance Computing ▪ nVME Storage ▪ Networking ▪ Accelerators ▪ Industrial Control Key Specifications ▪ PCIe Gen5 CC additive phase jitter <40fs RMS ▪ 12kHz–20MHz additive phase jitter = 165fs RMS at 156.
25MHz (typical) ▪ Output-to-output skew < 50ps ▪ Power consumption as low as 41mW (typical) ▪ 1MHz to 200MHz operating frequency Features ▪ 5–9 Low-Power HCSL (LP-HCSL) outputs • 100Ω outputs eliminate 4 resistors per output pair (9DBVxx41) • 33Ω outputs eliminate 2 resistors per output pair allowing use in both 85Ω and 100Ω systems (9DBVxx31) ▪ Easy AC-coupling to other logic families, see application note AN-891 ▪ Spread spectrum compatible ▪ OE# pins support PCIe CLKREQ# function ▪ 3 selectable SMBus addresses ▪ 3.
3V tolerant SMBus interface ▪ SMBus-selectable features allow optimization to customer requirements: • Individual slew rate control for each output • Differential output amplitude • Device contains default configuration; SMBus interface not required for device operation ▪ -40°C to +85°C operating temperature range ▪ Packages: See Ordering Information for more details Block Diagram VDDDIG1.
8 VDDR1.
8 VDDIO 7 and 9 output parts only CLK_IN# CLK_IN DIFn# DIFn vS ADR_tr i SMB CLK SMB DAT ^CKPWRGD_PD# vOE[n:0]# SMBus Factory Engine Configuration 5, 7 or 9 outputs n+1 Control Logic Resistors are integrated on 9DBVxx4x DIF0# DIF0 GNDR EPAD/GND GNDDIG ©2017–2023 Renesas Electronics Corporation 1 Febr...


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