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9DBL0452

Part Number	9DBL0452
Manufacturer	Renesas
Description	3.3V PCIe Zero Delay Buffer
Published	Jun 4, 2020
Detailed Description	4-Output 3.3V PCIe Zero Delay Buffer 9DBL0442 / 9DBL0452 Datasheet Description The 9DBL0442 / 9DBL0452 devices are 3.3...
Datasheet	9DBL0452 PDF File

Overview

4-Output 3.
3V PCIe Zero Delay Buffer 9DBL0442 / 9DBL0452 Datasheet Description The 9DBL0442 / 9DBL0452 devices are 3.
3V members of Renesas’ Full-Featured PCIe family.
The 9DBL0442 / 9DBL0452 supports PCIe Gen1–4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems.
It offers a choice of integrated output terminations providing direct connection to 85Ω or 100Ω transmission lines.
The 9DBL04P2 can be factory programmed with a user-defined power up default SMBus configuration.
Typical Application PCIe Gen1–4 clock distribution for Riser Cards, Storage, Networking, JBOD, Communications, Access Points Output Features ▪ Four 1–200 MHz Low-Power HCSL (LP-HCSL) DIF pairs • 9DBL0442 default ZOUT = 100Ω • 9DBL0452 default ZOUT = 85Ω • 9DBL04P2 factory programmable defaults ▪ Easy AC-coupling to other logic families, see Renesas application note AN-891 Key Specifications ▪ PCIe Gen1–4 CC compliant in ZDB mode ▪ PCIe Gen2 SRIS compliant in ZDB mode ▪ Supports PCIe Ge...

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