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ICS650-14

Part Number	ICS650-14
Manufacturer	Renesas
Description	NETWORKING SYSTEM CLOCK
Published	Jun 4, 2020
Detailed Description	NETWORKING SYSTEM CLOCK DATASHEET ICS650-14 Description The ICS650-14 is a low-cost, low-jitter, high-performance cloc...
Datasheet	ICS650-14 PDF File

Overview

NETWORKING SYSTEM CLOCK DATASHEET ICS650-14 Description The ICS650-14 is a low-cost, low-jitter, high-performance clock synthesizer customized for networking systems applications.
Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a 25 MHz clock or fundamental mode crystal input to produce multiple output clocks of one fixed 25 MHz, a four (plus one) frequency selectable bank, and two frequency selectable clocks.
All output clocks are frequency locked together.
All of the ICS650-14 outputs have zero ppm synthesis error.
Block Diagram Features • Packaged in 20-pin (150 mil) SSOP (QSOP) • 25 MHz fundamental crystal clock or clock input • One fixed output clock of 25 MHz • One bank of four frequency selectable output clocks • Three frequency selectable clocks outputs • Zero ppm synthesis error in all clocks • Ideal for networking systems • Full CMOS output swing • Advanced, low-power sub-micron CMOS process • Operating voltage of 3.
3 V or 5 V • Industrial temperature range available • Pb-free, RoHS compliant package VDD 2 SELA 0:1 SELB 0:1 SELC 2 2 C lock Synthesis and C o n tro l C irc u itry X 1 /IC L K 25 MHz Crystal or C lock X2 Crystal B u ffe r/ Crystal O scillator O ptional crystal capacitors are show n and m ay be required for tuning of initial accuracy (determ ined once per board) 2 GND 4 CLKA 1:4 CLKA5 CLKB CLKC 25 MHz O E (all outputs) IDT™ / ICS™ NETWORKING SYSTEM CLOCK 1 ICS650-14 REV H 051310 ICS650-14 NETWORKING SYSTEM CLOCK CLOCK SYNTHESIZER Pin Assignment SELB0 X2 X1/ICLK VDD SELB1 GND CLKB CLKC CLKA5 25M 1 2 3 4 5 6 7 8 9 10 20 SELC 19 SELA0 18 CLKA2 17 CLKA3 16 VDD 15 SELA1 14 GND 13 CLKA4 12 CLKA1 11 OE Table 2 20-pin (150 mil) SSOP SELB1 0 0 0 1 1 1 SELB0 0 M 1 0 M 1 CLKB 30 27 48 83.
33 19.
44 80 Pin Descriptions Table 1 SELA1 0 0 0 M M M 1 1 1 SELA0 0 M 1 0 M 1 0 M 1 CLKA1:4 33.
33 50 66.
67 100 33.
33 50 33.
33 25 66.
67 CLKA5 66.
66 75 133.
33 33.
33 83.
33 125 100 75 100 Table 3 SELC 0 M 1 CLKC...

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