DatasheetsPDF.com

IDT8N4Q001

Renesas
Part Number IDT8N4Q001
Manufacturer Renesas
Description Quad-Frequency Programmable XO
Published Aug 6, 2020
Detailed Description Quad-Frequency Programmable XO IDT8N4Q001 REV G DATA SHEET General Description The IDT8N4Q001 is a Quad-Frequency Progr...
Datasheet PDF File IDT8N4Q001 PDF File

IDT8N4Q001
IDT8N4Q001



Overview
Quad-Frequency Programmable XO IDT8N4Q001 REV G DATA SHEET General Description The IDT8N4Q001 is a Quad-Frequency Programmable Clock Oscillator with very flexible frequency programming capabilities.
The device uses IDT’s fourth generation FemtoClock® NG technology for an optimum high clock frequency and low phase noise performance.
The device accepts 2.
5V or 3.
3V supply and is packaged in a small, lead-free (RoHS 6) 10-lead ceramic 5mm x 7mm x 1.
55mm package.
Besides the four default power-up frequencies set by the FSEL0 and FSEL1 pins, the IDT8N4Q001 can be programmed via the I2C interface to output clock frequencies between 15.
476MHz to 866.
67MHz and from 975MHz to 1,300MHz to a very high degree of precision with a frequency step size of 435.
9Hz ÷ N (N is the PLL output divider).
Since the FSEL0 and FSEL1 pins are mapped to four independent PLL divider registers (P, MINT, MFRAC and N), reprogramming those registers to other frequencies under control of FSEL0 and FSEL1 is supported.
The extended temperature range supports wireless infrastructure, telecommunication and networking end equipment requirements.
Features • Fourth generation FemtoClock® NG technology • Programmable clock output frequency from 15.
476MHz to 866.
67MHz and from 975MHz to 1,300MHz • Four power-up default frequencies (see part number order codes), re-programmable by I2C • I2C programming interface for the output clock frequency and internal PLL control registers • Frequency programming resolution is 435.
9Hz ÷N • One 2.
5V, 3.
3V LVDS clock output • Two control inputs for the power-up default frequency • LVCMOS/LVTTL compatible control inputs • RMS phase jitter @ 156.
25MHz (12kHz - 20MHz): 0.
253ps (typical), integer PLL feedback configuration • RMS phase jitter @ 156.
25MHz (1kHz - 40MHz): 0.
263ps (typical), integer PLL feedback configuration • Full 2.
5V or 3.
3V supply modes • -40°C to 85°C ambient operating temperature • Available in Lead-free (RoHS 6) package Block Diagram OSC ÷P fXTAL 2 FS...



Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)