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R5F572NDDDBD

Renesas
Part Number R5F572NDDDBD
Manufacturer Renesas
Description MCU
Published Aug 10, 2020
Detailed Description Features Datasheet RX72N Group Renesas MCUs R01DS0343EJ0100 Rev.1.00 240-MHz 32-bit RX MCU, on-chip double-precision...
Datasheet PDF File R5F572NDDDBD PDF File

R5F572NDDDBD
R5F572NDDDBD


Overview
Features Datasheet RX72N Group Renesas MCUs R01DS0343EJ0100 Rev.
1.
00 240-MHz 32-bit RX MCU, on-chip double-precision FPU, 1396 CoreMark, May 31, 2019 Arithmetic unit for trigonometric functions, up to 4-MB flash memory (supportive of the dual bank function), 1-MB SRAM, various communications interfaces including Ethernet MAC compliant with IEEE 1588, SD host interface, quad SPI, and CAN, 12-bit A/D converter, RTC, Encryption functions (optional), Serial sound interface, CMOS camera interface, Graphic-LCD controller, 2D drawing engine Features ■ 32-bit RXv3 CPU core  Maximum operating frequency: 240 MHz Capable of 1396 CoreMark in operation at 240 MHz  Double-precision 64-bit IEEE-754 floating point  A collective register bank save function is available.
 Supports the memory protection unit (MPU)  JTAG and FINE (one-line) debugging interfaces ■ Low-power design and architecture  Operation from a single 2.
7- to 3.
6-V supply  RTC is capable of operation from a dedicated power supply.
 Four low-power modes ■ On-chip code flash memory  Supports versions with up to 4 Mbytes of ROM  No wait cycles at up to 120 MHz or when the ROM cache is hit, one-wait state at above 120 MHz  User code is programmable by on-board or off-board programming.
 Programming/erasing as background operations (BGOs)  A dual-bank structure allows exchanging the start-up bank.
■ On-chip data flash memory  32 Kbytes, reprogrammable up to 100,000 times  Programming/erasing as background operations (BGOs) ■ On-chip SRAM  1 Mbyte of SRAM (no wait states; however, if ICLK is at a frequency above 120 MHz, access to locations in the 512 Kbytes of SRAM from 0080 0000h to 0087 FFFFh requires one cycle of waiting)  32 Kbytes of RAM with ECC (single error correction/double error detection)  8 Kbytes of standby RAM (backup on deep software standby) ■ Data transfer  DMACAa: 8 channels  DTCb: 1 channel  EXDMAC: 2 channels  DMAC for the Ethernet controller: 3 channels ■ Reset and sup...


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