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SN54ALS112A

Texas Instruments
Part Number SN54ALS112A
Manufacturer Texas Instruments
Description Dual J-K Negative-Edge-Triggered Flip-Flop
Published Dec 10, 2020
Detailed Description SN54ALS112A, SN74ALS112A DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SDAS199A − APRIL 1982 − REVIS...
Datasheet PDF File SN54ALS112A PDF File

SN54ALS112A
SN54ALS112A

Overview
SN54ALS112A, SN74ALS112A DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SDAS199A − APRIL 1982 − REVISED DECEMBER 1994 • Fully Buffered to Offer Maximum Isolation From External Disturbance • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs TYPE ′ALS112A TYPICAL MAXIMUM CLOCK FREQUENCY (MHz) 50 TYPICAL POWER DISSIPATION PER FLIP-FLOP (mW) 6 SN54ALS112A .
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J PACKAGE SN74ALS112A .
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D OR N PACKAGE (TOP VIEW) 1CLK 1 1K 2 1J 3 1PRE 4 1Q 5 1Q 6 2Q 7 GND 8 16 VCC 15 1CLR 14 2CLR 13 2CLK 12 2K 11 2J 10 2PRE 9 2Q description These devices contain two independent J-K negative-edge-triggered flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs.
When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to the outputs on the negative-g...


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