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74AHCT138BQ

nexperia
Part Number 74AHCT138BQ
Manufacturer nexperia
Description 3-to-8 line decoder/demultiplexer
Published Dec 26, 2020
Detailed Description 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 5 — 10 September 2020 Product data sheet 1. Gene...
Datasheet PDF File 74AHCT138BQ PDF File

74AHCT138BQ
74AHCT138BQ

Overview
74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Rev.
5 — 10 September 2020 Product data sheet 1.
General description The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard No.
7A.
The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer.
It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected.
There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3).
Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74AHC138; 74AHCT138 devices and one inverter.
The 74AHC138; 74AHCT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data...


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