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74AHC2G126DP

nexperia
Part Number 74AHC2G126DP
Manufacturer nexperia
Description Dual buffer/line driver
Published Dec 26, 2020
Detailed Description 74AHC2G126; 74AHCT2G126 Dual buffer/line driver; 3-state Rev. 8 — 19 November 2018 Product data sheet 1. General desc...
Datasheet PDF File 74AHC2G126DP PDF File

74AHC2G126DP
74AHC2G126DP


Overview
74AHC2G126; 74AHCT2G126 Dual buffer/line driver; 3-state Rev.
8 — 19 November 2018 Product data sheet 1.
General description The 74AHC2G126 and 74AHCT2G126 are high-speed Si-gate CMOS devices.
They provide a dual non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (nOE).
A LOW at nOE causes the output to assume a high-impedance OFFstate.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.
5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.
5 V to 5.
5 V.
2.
Features and benefits • Symmetrical output impedance • High noise immunity • Low power dissipation • Balanced propagation delays • ESD protection: • HBM JESD22-A114E: exceeds 2 000 V • MM JESD22-A115-A: exceeds 200 V • CDM JESD22-C101C: exceeds 1 000 V • Specified from -40 °C to +125 °C 3.
Ordering information Table 1.
Ordering information Type number Package Temperature range Name 74AHC2G126DP -40 °C to +125 °C TSSOP8 74AHC2G126DC 74AHCT2G126DC -40 °C to +125 °C VSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.
5 mm plastic very thin shrink small outline package; 8 leads; body width 2.
3 mm Version SOT505-2 SOT765-1 4.
Marking Table 2.
Marking codes Type number 74AHC2G126DP 74AHC2G126DC 74AHCT2G126DC Marking[1] A26 A26 C26 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Nexperia 5.
Functional diagram 74AHC2G126; 74AHCT2G126 Dual buffer/line driver; 3-state 1A 2 1 1OE 2A 5 7 2OE 1Y 6 2Y 3 mna946 Fig.
1.
Logic symbol 2 1 1 EN1 6 5 3 7 mna947 Fig.
2.
IEC logic symbol nA nY nOE mna234 Fig.
3.
Logic diagram (one buffer) 6.
Pinning information 6.
1.
Pinning 74AHC2G126 74AHCT2G126 1OE 1 1A 2 2Y 3 GND 4 8 VCC 7 2OE 6 1Y 5 2A 001aaj262 Fig.
4.
Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 6.
2.
Pin description Table 3.
Pin description Symbol Pin 1OE,...



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