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74AHCT74D

nexperia
Part Number 74AHCT74D
Manufacturer nexperia
Description Dual D-type flip-flop
Published Dec 26, 2020
Detailed Description 74AHC74; 74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 8 — 22 April 2020 Product data...
Datasheet PDF File 74AHCT74D PDF File

74AHCT74D
74AHCT74D

Overview
74AHC74; 74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Rev.
8 — 22 April 2020 Product data sheet 1.
General description The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7-A.
The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD).
It also has complementary outputs (Q and Q).
The set and reset are asynchronous active LOW inputs that operate independent of the clock input.
Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock pulse.
The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
2.
Features and benefits...


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