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74HCT157PW

nexperia
Part Number 74HCT157PW
Manufacturer nexperia
Description Quad 2-input multiplexer
Published Dec 26, 2020
Detailed Description 74HC157; 74HCT157 Quad 2-input multiplexer Rev. 9 — 24 July 2020 Product data sheet 1. General description The 74HC157...
Datasheet PDF File 74HCT157PW PDF File

74HCT157PW
74HCT157PW

Overview
74HC157; 74HCT157 Quad 2-input multiplexer Rev.
9 — 24 July 2020 Product data sheet 1.
General description The 74HC157; 74HCT157 is a quad 2-input multiplexer.
The device features select (S) and enable E inputs.
A HIGH on S selects data source 1, a LOW data source 0.
A HIGH on E forces all the outputs (1Y to 4Y) LOW.
Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2.
Features and benefits • Wide supply voltage range from 2.
0 V to 6.
0 V • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards: • JESD8C (2.
7 V to 3.
6 V) • JESD7A (2.
0 V to 6.
0 V) • Input levels: • For 74HC157: CMOS level • For 74HCT157: TTL level • Non-inverting data path • ESD protection: • • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3.
Ordering information Table 1.
Ordering information Type number Package Temperature range Name 74HC157D -40 °C to +125 °C SO16 74HCT157D 74HC157PW -40 °C to +125 °C TSSOP16 74HCT157PW 74HC157BQ -40 °C to +125 °C DHVQFN16 74HCT157BQ Description plastic small outline package; 16 leads; body width 3.
9 mm plastic thin shrink small outline package; 16 leads; body width 4.
4 mm plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.
5 × 3.
5 × 0.
85 mm Version SOT109-1 SOT403-1 SOT763-1 Nexperia 4.
Functional diagram S 74HC157; 74HCT157 Quad 2-input multiplexer E 1I1 1I0 2I1 2I0 3I1 3I0 4I1 4I0 Fig.
1.
Logic diagram 1Y 2Y 3Y 4Y mna484 2 3 5 6 11 10 14 13 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 1S 15 E 1Y 2Y 3Y 4Y 4 7 Fig.
2.
logic symbol 9 12 mna481 2 1I0 3 1I1 5 2I0 6 2I1 11 3I0 10 3I1 14 4I0 13 4I1 SELECTOR S 1 Fig.
3.
Logic symbol 1Y 4 2Y 7 MULTIPLEXER OUTPUTS 3Y 9 4Y 12 E 15 mna483 1 G1 15 EN 2 1 ...


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