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74ALVCH16823DGG

Part Number	74ALVCH16823DGG
Manufacturer	nexperia
Description	18-bit bus-interface D-type flip-flop
Published	Jan 4, 2021
Detailed Description	74ALVCH16823 18-bit bus-interface D-type flip-flop with reset and enable; 3-state Rev. 3 — 1 February 2018 Product d...
Datasheet	74ALVCH16823DGG PDF File

Overview

74ALVCH16823 18-bit bus-interface D-type flip-flop with reset and enable; 3-state Rev.
3 — 1 February 2018 Product data sheet 1 General description The 74ALVCH16823 is a 18-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications.
Incorporates bushold data inputs which eliminate the need for external pull-up resistors to hold unused inputs.
The 74ALVCH16823 consists of two sections of nine edge-triggered flip-flops.
A clock (nCP) input, an output-enable (nOE) input, a master reset (nMR) input and a clockenable (nCE) input are provided for each total 9-bit section.
With the clock-enable (nCE) input LOW, the D-type flip-flops will store the state of their individual nDn-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH nCP transition.
Taking nCE HIGH disables the clock buffer, thus latching the outputs.
Taking the master reset (nMR) input LOW causes all the nQn outputs to go LOW indepen...

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74ALVCH16823DGG 18-bit bus-interface D-type flip-flop - nexperia

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