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TC358770AXBG

Toshiba
Part Number TC358770AXBG
Manufacturer Toshiba
Description Mobile Peripheral
Published Jan 20, 2021
Detailed Description TC358770AXBG/TC358777XBG CMOS Digital Integrated Circuit Silicon Monolithic TC358770AXBG/TC358777XBG Mobile Periphera...
Datasheet PDF File TC358770AXBG PDF File

TC358770AXBG
TC358770AXBG


Overview
TC358770AXBG/TC358777XBG CMOS Digital Integrated Circuit Silicon Monolithic TC358770AXBG/TC358777XBG Mobile Peripheral Devices TC358770AXBG Overview This Functional Specification defines operation of TC358770AXBG / TC358777XBG chip, which concatenates two DSISM streams of video packets, one from each DSI link into a single DisplayPortTM video stream.
The only difference between TC358770AXBG and TC3587777XBG is the package size.
TC358770AXBG housed in a 5.
0 mm by 5.
0 mm size package with 0.
4 mm ball pitch.
While TC358777XBG housed in a 7.
0 mm by 7.
0 mm size package with 0.
65 mm ball pitch.
P-VFBGA100-0505-0.
40-001 Weight: 40 mg (Typ.
) TC358777XBG TC358770AXBG / TC358777XBG exhibits two independent 4-data lane DSI receivers and one 4-lane DisplayPortTM transmitter.
Each DSI link data lane can receive data up to 1 Gbps/lane, with up to 8 Gbps total input data rate.
Each DSI receiver link can activate 0-, 1-, 2-, 3- or 4-data lanes independently.
DP main link can toggle bit rate P-VFBGA80-0707-0.
65-001 Weight: 66 mg (Typ.
) at either 1.
62 or 2.
7 Gbps per lane, with maximum output data rate at 8.
64 Gbps.
DP transmitter is able to operate with 1-, 2 or 4-lanes in its main link.
The target application is for high resolution DisplayPortTM panels, whose bandwidth requirement cannot be met by a single 4-data lane DSI link @4 Gbps.
TC358770AXBG is an ideal bridge chip which enables application processors, or hosts, with dual DSI links to drive up to 2560 x 2048 x 24 (or 18) DisplayPortTM panels @60fps.
Features ● TC358770AXBG / TC358777XBG follows the following standards:  MIPI® DSISM version 1.
02, Jan 2010.
 MIPI® D-PHYSM version 1.
0, May 2009.
 VESA® DisplayPortTM Standard version 1.
1a, Jan.
11 2008.
 Digital Content Protection LLC, HDCP version 1.
3 with DisplayPortTM amendment revision 1.
1, Jan.
15 2010.
● DSI Receiver  Dual 4-Data Lane DSI Link with Bi-direction support at Data Lane 0, it can be used in 1-, 2-, 3- or 4-data lane configuration.
 Maximu...



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