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TC74LCX273FK

Toshiba Semiconductor
Part Number TC74LCX273FK
Manufacturer Toshiba Semiconductor
Description Low-Voltage Octal D-Type Flip-Flop
Published Jan 28, 2021
Detailed Description TC74LCX273F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LCX273F, TC74LCX273FK Low-Voltage Octal D-...
Datasheet PDF File TC74LCX273FK PDF File

TC74LCX273FK
TC74LCX273FK

Overview
TC74LCX273F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LCX273F, TC74LCX273FK Low-Voltage Octal D-Type Flip-Flop with Clear with 5-V Tolerant Inputs and Outputs The TC74LCX273 is a high-performance CMOS octal D-type flip-flop.
Designed for use in 3.
3-V systems, it achieves high-speed operation while maintaining the CMOS low-power dissipation.
The device is designed for low-voltage (3.
3 V) VCC applications, but it could be used to interface to 5-V supply environment for both inputs and outputs.
This 8 bit D-type flip-flop is controlled by a clock input (CK) and a clear input ( CLR ).
When the CLR input is low, the eight outputs are at a low logic level.
All inputs are equipped with protection circuits against static discharge.
Features • Low-voltage operation: VCC = 1.
65 to 3.
6 V • High-speed operation: tpd = 8.
5 ns (max) (VCC = 3.
0 to 3.
6 V) • Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.
0 V) • Latch-up performance: ＞±500 mA • Available in JEITA SOP, VSSOP (US) • Power-down protection is provided on all inputs and outputs • Pin and function compatible with the 74 series (74AC/VHC/HC/F/ALS/LS etc.
) 273 type TC74LCX273F TC74LCX273FK Weight SOP20-P-300-1.
27A VSSOP20-P-0030-0.
50 : 0.
22 g ( typ.
) : 0.
03 g ( typ.
) Note: The Electrical Characteristics of VCC = 1.
8 ± 0.
15 V is only applicable for products which manufactured from January 2009 onward.
© 2018 1 Toshiba Electronic Devices & Storage Corporation Start of commercial production 2000-02 2018-08-02 Pin Assignment (top view) IEC Logic Symbol TC74LCX273F/FK 1 Q1 2 D1 3 D2 4 Q2 5 Q3 6 D3 7 D4 8 Q4 9 GND 10 20 VCC 19 Q8 18 D8 17 D7 16 Q7 15 Q6 14 D6 13 D5 12 Q5 11 CK (1) (11) CK R C1 D1 D2 (3) (4) (7) 1D D3 (8) D4 (13) D5 D6 D7 D8 (14) (17) (18) (2) (5) (6) Q1 Q2 Q3 (9) Q4 (12) (15) (16) (19) Q5 Q6 Q7 Q8 Truth Table CLR L H H H Inputs D X L H X X: Don’t care System Diagram Outputs Function CK Q X L Clear L  H  Qn No change D1 D2 D3 D4 D5...


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