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TC74VHC373FK

Toshiba

Octal D-Type Latch

TC74VHC373F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC373F, TC74VHC373FK Octal D-Type Latch w...


TC74VHC373FK

Toshiba


Octopart Stock #: O-1471893

Findchips Stock #: 1471893-F

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Description
TC74VHC373F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC373F, TC74VHC373FK Octal D-Type Latch with 3-State Output The TC74VHC373 is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while
More View maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. TC74VHC373F TC74VHC373FK Features  High speed: tpd = 5.0 ns (typ.) at VCC = 5 V  Low power dissipation: ICC = 4 μA (max) at Ta = 25°C  High noise immunity: VNIH = VNIL = 28% VCC (min)  Power down protection is provided on all inputs.  Balanced propagation delays: tpLH ∼− tpHL  Wide operating voltage range: VCC (opr) = 2 to 5.5 V  Low noise: VOLP = 0.8 V (max)  Pin and function compatible with 74ALS373 Weight SOP20-P-300-1.27A VSSOP20-P-0030-0.50 : 0.22 g (typ.) : 0.03 g (typ.) © 2019 1 Toshiba Electronic Devices & Storage Corporation Start of commercial production 1991-05 2019-01-31 Pin Assignment IEC Logic Symbol TC74VHC373F/FK 1 Q0 2 D0 3 D1 4 Q1 5 Q2 6 D2 7 D3 8 Q3 9 GND 10 (top view) 20 VCC 19 Q7 18 D7 17 D6 16 Q6 15 Q5 14 D5 13 D4 12 Q4 11 LE (1) EN LE (11) C1 D0 (3) 1D D1 (4) D2 (7) D3 (8) D4 (13) D5 (14) D6 (17) D7 (18) (2) Q0 (5) Q1 (6) Q2 (9) Q3 (12) Q4 (15) Q5 (16) Q6 (19) Q7 Truth Table Inputs OE LE D H X X L L X L H L L H H Output Z Qn L H X: Don’t care Z: High impedance Qn: Q outputs are latched at the time when the LE input is taken to a low logic level. System Diagram D0 3 D D1 4 D D2 7 D D3 8 D D4 13 D D5 14 D D6 17 D D7 18 D 11 LE L L L L L L L L 1 2 5 6 9 12 15 16 19 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 © 2019 2 Toshiba Electronic Devices & Storage Corporation 2019-01-31 Absolute Maximum Ratings (Note) TC74VHC373F/FK Characteristics Symbol Rating Unit Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature VCC VIN VOUT IIK IOK IOUT ICC PD Tstg −0.5 to 7.0 V −0.5 to 7.0 V −0.5 to VCC + 0.5 V −20 mA ±20 mA ±25 mA ±75 mA 180 mW −65 to 150 °C Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (






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