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TC7SZ00AFS

Toshiba
Part Number TC7SZ00AFS
Manufacturer Toshiba
Description 2-Input NAND Gate
Published Feb 16, 2021
Detailed Description CMOS Digital Integrated Circuits Silicon Monolithic TC7SZ00AFS TC7SZ00AFS 1. Functional Description • 2-Input NAND Gat...
Datasheet PDF File TC7SZ00AFS PDF File

TC7SZ00AFS
TC7SZ00AFS


Overview
CMOS Digital Integrated Circuits Silicon Monolithic TC7SZ00AFS TC7SZ00AFS 1.
Functional Description • 2-Input NAND Gate 2.
Features (1) Wide operating temperature range: Topr = -40 to 125  (Note 1) (2) High output current: ±24 mA (min) at VCC = 3.
0 V (3) Super high speed operation: tpd = 2.
4 ns (typ.
) at VCC = 5.
0 V, CL = 50 pF (4) Operation voltage range: VCC = 1.
65 to 5.
5 V (5) 5.
5 V tolerant inputs Note 1: For devices with the ordering part number ending in J(T.
Topr = -40 to 85  for the other devices.
3.
Packaging fSV 4.
Marking and Pin Assignment Marking Pin Assignment (Top view) ©2016-2019 Toshiba Electronic Devices & Storage Corporation 1 Start of commercial production 2008-02 2019-01-30 Rev.
3.
0 5.
IEC Logic Symbol TC7SZ00AFS 6.
Truth Table A B Y L L H L H H H L H H H L 7.
Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 ) Characteristics Symbol Note Rating Unit Supply voltage VCC -0.
5 to 6.
0 V Input voltage VIN -0.
5 to 6.
0 V DC output voltage VOUT -0.
5 to VCC + 0.
5 V Input diode current IIK -20 mA Output diode current IOK (Note 1) ±20 mA DC output current IOUT ±50 mA VCC/ground current ICC ±50 mA Power dissipation PD 50 mW Storage temperature Tstg -65 to 150  Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.
Using continuously under heavy loads (e.
g.
the application of high temperature/current/voltage and the significant change in temperature, etc.
) may cause this product to decrease in the reliability significantly even if the operating conditions (i.
e.
operating temperature/current/voltage, etc.
) are within the absolute maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.
e.
reliability test report and esti...



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