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ICS9248-95 Datasheet PDF

Renesas
Part Number ICS9248-95
Manufacturer Renesas
Title Frequency Generator & Integrated Buffer
Description The ICS9248-95 is the single chip clock solution for Desktop designs using the VIA MVP4 style chipset. It provides all necessary clock signals for...
Features
• Up to 124MHz frequency support.
• Spread Spectrum for EMI control ±0.5% center spread and ±0.25% center spread
• Serial I2C interface for Power Management, Frequency Select, Spread Spectrum.
• Provides the following system clocks - 4-CPUs @ 3.3V, up to 124MHz. - 13-SDRAMs @3.3V, up to 124MHz (incl...

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ICS9248-95 ICS9248-95 ICS9248-95




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ICS9248-101 : The ICS9248-101 is the single chip clock solution for Notebook designs using the 440BX or the VIA Apollo Pro 133 style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-101 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. • • Features • • • • Up to 137MHz frequency support Spread Spectrum for EMI control Serial I2C interface for Power Management, Frequency Select, .

ICS9248-103 : The ICS9248-103 is the single chip clock solution for Notebook designs using the 440BX or the VIA Apollo Pro 133 style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-103 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. • Features • • • • Up to 137MHz frequency support Spread Spectrum for EMI control Serial I2C interface for Power Management, Frequency Select, Sp.

ICS9248-107 : The ICS9248-107 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs. This chip provides all the clocks required for such a system when used with a zero delay buffer such as the ICS9179-06. Spread Spectrum may be enabled through I2C. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-107 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Pin Descriptions Pin number Pin name 1, 7, 13, 19, 25, 31 GND 2 REF0 REF1 3 SEL24_48# 4, 10, 16, 23, VDD 28, 35 5 X1.

ICS9248-110 : PIN NUMBER 2, 1 3 4 5 6, 12 7 17, 16, 14, 13, 11, 10, 8 9, 15 18 20, 19 21 34 33 22 23 24 25 26 27 28 29 30 31 32 46 34 35, 44 42, 39, 36 43, 40, 37 38, 41 45 47 48 PIN NAME FS (1:0) REF (1:0) GNDREF X1 X2 GNDPCI PCICLK_F PCICLK (6:0) VDDPCI VDDAGP AGP (1:0) GNDAGP VDD GND VDD48 48MHz SEL24-48# 24-48MHz GND48 SCLK SDATA FS2 SPREAD# PD# CPU_STOP# PCI_STOP# SDRAM_OUT VDD RESERVED CPUCLKT (2:0) CPUCLKC (2:0) GNDCPU VDDSD GNDSD VDDREF TYPE IN OUT PWR IN OUT PWR OUT OUT PWR PWR OUT PWR PWR PWR PWR OUT IN OUT PWR IN I/O IN IN IN IN IN OUT PWR N/C OUT OUT PWR PWR PWR PWR DESCRIPTION Frequency Select pins, has pull-up to VDD 14.318MHz clock output Ground for REF outputs XTAL_IN 14.318MHz Crystal in.

ICS9248-112 : The ICS9248-112 is the single chip clock solution for designs using the 810/810E style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-112 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Serial programming I2C interface allows changing functions, stop clock programming and frequency selection. Power Groups GNDREF, VDDREF = REF0, X1, X2 GNDPCI , VDDPCI = PCICLK [.

ICS9248-114 : PIN NUMBER 1 2 CPU_STOP#1, 2 3,9,16,22, 33,39,45, 47 4 5 6,14 7 MODE1, 2 8 10 13, 12, 11 15 17, 18, 20, 21, 28, 29, 31, 32, 34, 35,37,38 19,30,36 23 24 25 26 27 40 41 42 46, 43 44 48 FS31, 2 PCICLK0 SEL24_48#1, 2 PCICLK1 PCICLK (4:2) BUFFER IN SDRAM (11:0) VDD3 SDATA SCLK 24_48MHz FS11, 2 48MHz FS0 1, 2 P I N NA M E VDD1 REF0 TYPE PWR OUT IN PWR IN OUT PWR OUT IN IN OUT IN OUT OUT IN OUT PWR IN IN OUT IN OUT IN PWR OUT IN PWR OUT OUT OUT IN DESCRIPTION REF, XTAL power supply, nominal 3.3V 14.318 Mhz reference clock.This REF output is the STRONGER buffer for ISA BUS loads This asynchronous input halts CPUCLKT, CPUCLKC & SDRAM at logic "0" level when driven low. Ground Crystal input, has i.

ICS9248-126 : The ICS9248-126 is the single chip clock solution for Desktop/Notebook designs using the SIS 540/630 style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-126 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Serial programming I2C interface allows changing functions, stop clock programming and frequency selection. Power Groups VDDREF = REF, X1, X2 VDDPCI = PCICLK.

ICS9248-127 : The ICS9248-127 is the single chip clock solution for Desktop designs using the VIA MVP4 and Aladdin 7 style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248127 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Features • • • • Up to 124MHz frequency support. Spread Spectrum for EMI control 0 to -0.5% down spread and ±0.25% center spread Serial I2C interface for Po.

ICS9248-128 : P in number 1 2 1,2 3,9,16,22, 27,33,39 4 5 6,14 7 1,2 8 1,2 13, 12, 11, 10 15,28,29,31,32, 34,35,37,38 P in name V DDR/X RE F0 M ode GND X1 X2 V DDP CI FS 1 P CICLK _F P CICLK 0 FS 2 P CICLK (4:1) S DRA M 12, S DRA M (7:0) S DRA M 11 CP U_S TOP # S DRA M 10 Type P ower Output Input P ower Input Output P ower Input Output Output Input Output Output Output Input Output Input P ower Output Input Output Input Input Input Input Output Input Output P ower 0utput P ower Output Input P ower Output Input Output P ower D escription Is olated 3.3 V power for crys tal & referenc e 3.3V , 14.318 M Hz referenc e clock output. Function s elec t pin, 1= des k top m ode, 0= m obile m ode. Latc hed input.

ICS9248-128 : Pin number 1 21,2 3,9,16,22, 27,33,39 4 5 6,14 71,2 81,2 13, 12, 11, 10 15,28,29,31,32, 34,35,37,38 Pin name V DDR/X REF0 M ode GND X1 X2 V DDP CI FS1 PCICLK_F PCICLK 0 FS2 P CICLK (4:1) SDRAM 12, S DRAM (7:0) SDRAM 11 Type P ower Output Input D escription Is olated 3.3 V power for crys tal & referenc e 3.3V, 14.318 MHz reference clock output. Function select pin, 1=desk top mode, 0=mobile mode. Latched input. Power 3.3 V Ground Input Output P ower Input Output Output Input Output 14.318 MHz crystal input 14.318 MHz crystal output 3.3 V power for the PCI clock outputs Logic input frequency s elec t bit. Input latched at power-on. 3.3 V free running PCI c loc k output, will not be sto.

ICS9248-131 : PIN NUMBER 1, 6, 14, 19, 30, 36, 48 2 C P U 2 . 5 _ 3 . 3 # 1,2 3,9,16,22,27, 33,39,45 4 5 GND X1 X2 PCICLK_F 7 FS11, 2 8 13, 12, 11, 10 15 17 PCICLK0 FS21, 2 PCICLK(4:1) BUFFERIN CPU_STOP#1 SDRAM 11 18 40, 28, 29, 31, 32, 34, 35, 37, 38 20 PCI_STOP# SDRAM 10 SDRAM (12, 7:0) AGP_STOP# SDRAM9 21 23 24 25 PD# SDRAM8 SDATA SCLK AGP_F MODE1, 2 48MHz 26 41, 43, 44 42 46, 47 FS01, 2 CPUCLK(2:0) VDDL AGP (1:0) 1 P I N NA M E VDD REF0 TYPE PWR OUT IN PWR IN OUT OUT IN OUT IN OUT IN IN OUT IN OUT OUT IN OUT IN OUT I/O IN OUT IN OUT IN OUT PWR OUT Power supply, nominal 3.3V 14.318 Mhz reference clock. DESCRIPTION Indicates whether VDDL is 3.3V or 2.5V. High=2.5V CPU, LOW=3.3V C P U 1. L a t c h e.

ICS9248-134 : The ICS9248-134 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs. This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator(DRCG) chip such as the ICS9212-01. Spread Spectrum may be enabled by driving the SPREAD# pin active. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-134 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. The CPU/2 clocks are inputs to the DRCG. Pin Descriptions Pin number Pi.

ICS9248-135 : The ICS9248-135 is the single chip clock solution for Desktop/Notebook designs using the SIS 540/630 style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-135 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Serial programming I2C interface allows changing functions, stop clock programming and frequency selection. Pin Configuration PIN NUMBER 1, 6, 15, 19, 27, 30.

ICS9248-136 : 3.3V Power supply for SDRAM output buffers, PCI output buffers, reference output buffers and 48MHz output AGP frequency select pin. 14.318 MHz reference clock. Frequency select pin. 14.318 MHz reference clock. Ground pin for 3V outputs. Crystal input,nominally 14.318M Hz. Crystal output, nominally 14.318MHz. Frequency select pin. PCI clock output, not affected by PCI_STOP# Frequency select pin. PCI clock output. PCI clock outputs. AGP outputs defined as 2X PCI. These may not be stopped. Frequency select pin. 48M Hz output clock Pin 27, 28, 30, & 31 function select pin 0=Desktop 1=M obile mode Clock output for super I/O/USB default is 24M Hz Data pin for I C circuitry 5V tolerant Clock pin of.

ICS9248-138 : The ICS9248-138 is the single chip clock solution for designs using the 810/810E and Solano style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-138 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Serial programming I2C interface allows changing functions, stop clock programming and frequency selection. Pin Configuration PIN NUMBER PIN NAME SEL24_48M Hz# REF0 2.

ICS9248-138 : The ICS9248-138 is the single chip clock solution for designs using the 810/810E and Solano style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-138 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Serial programming I2C interface allows changing functions, stop clock programming and frequency selection. Pin Configuration PIN NUMBER PIN NAME 1 SEL24_48MHz# 2.

ICS9248-141 : .




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