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ICS9248-101

Integrated Circuit Systems
Part Number ICS9248-101
Manufacturer Integrated Circuit Systems
Description Frequency Generator & Integrated Buffers
Published Oct 7, 2005
Detailed Description Integrated Circuit Systems, Inc. ICS9248-101 Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6 General D...
Datasheet PDF File ICS9248-101 PDF File

ICS9248-101
ICS9248-101

Overview
Integrated Circuit Systems, Inc.
ICS9248-101 Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6 General Description The ICS9248-101 is the single chip clock solution for Notebook designs using the 440BX or the VIA Apollo Pro 133 style chipset.
It provides all necessary clock signals for such a system.
Spread spectrum may be enabled through I2C programming.
Spread spectrum typically reduces system EMI by 8dB to 10dB.
This simplifies EMI qualification without resorting to board design iterations or costly shielding.
The ICS9248-101 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations.
• • Features • • • • Up to 137MHz frequency support Spread Spectrum for EMI control Serial I2C interface for Power Management, Frequency Select, Spread Spectrum.
Provides the following system clocks - 4-CPUs @ 2.
5/3.
3V, up to 137MHz.
(including CPUCLK_F) - 9-SDRAMs @3.
3V, up to 137MHz (including SDRAM_F) - 8-PCI @3.
3V, CPU/2 or CPU/3 (including 1 free running PCICLK_F) - 1-24/48MHz @3.
3V - 1-48MHz @3.
3V fixed - 2-REF @3.
3V, 14.
318MHz.
Efficient Power management scheme through PCI and STOP CLOCKS Spread Spectrum ± .
25%, & 0 to -0.
5% down spread Block Diagram Pin Configuration VDDREF REF0 GNDREF X1 X2 VDDPCI *CPU2.
5_3.
3#/PCICLK_F *FS3/PCICLK0 GNDPCI *SEL24_48#/PCICLK1 PCICLK2 PCICLK3 PCICLK4 VDDPCI BUFFER IN GNDPCI PCICLK5 PCICLK6 VDDCOR PCI_STOP# *PD# GND48 SDATA 2 I C SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 REF1/FS2* VDDLCPU CPUCLK_F CPUCLK0 GNDLCPU CPUCLK1 CPUCLK2 CLK_STOP# GNDSDR SDRAM_F SDRAM0 SDRAM1 VDDSDR SDRAM2 SDRAM3 GNDSDR SDRAM4 SDRAM5 VDDSDR SDRAM6 SDRAM7 VDD48 48MHz/FS0* 24_48MHz/FS1* { Power Groups VDDLCPU, GNDLCPU = CPUCLK [2:0], CPUCLK_F VDDSDR, GNDSDR = SDRAMCLKS [7:0], SDRAM_F VDDPCI, GNDPCI = PCICLKS [6:0], PCICLK_F VDD48, GND48 = 48MHz, 24MHz VDDREF, GNDREF = REF, X1, X2 VDD...


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