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CD74HC373M96 Datasheet PDF

Texas Instruments
Part Number CD74HC373M96
Manufacturer Texas Instruments
Title OCTAL TRANSPARENT D-TYPE LATCHES
Description ordering information The ’HC373 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation. CD54HC373 F PACKAGE CD7...
Features edance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new dat...

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CD74HC373M96 CD74HC373M96 CD74HC373M96




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CD74HC373 : The CBT16211 provides 24 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as a dual 12-bit bus switch with separate output-enable (OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and a high-impedance state exists between the ports. The CBT16211 is characterized for operation from –40 to 85 °C. • ESD protection exceeds 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which ex.

CD74HC373 : ordering information The ’HC373 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation. CD54HC373 F PACKAGE CD74HC373 E OR M PACKAGE (TOP VIEW) OE 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 LE When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines signific.

CD74HC373E : The CBT16211 provides 24 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as a dual 12-bit bus switch with separate output-enable (OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and a high-impedance state exists between the ports. The CBT16211 is characterized for operation from –40 to 85 °C. • ESD protection exceeds 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which ex.

CD74HC373E : ordering information The ’HC373 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation. CD54HC373 F PACKAGE CD74HC373 E OR M PACKAGE (TOP VIEW) OE 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 LE When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines signific.

CD74HC373M : The CBT16211 provides 24 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as a dual 12-bit bus switch with separate output-enable (OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and a high-impedance state exists between the ports. The CBT16211 is characterized for operation from –40 to 85 °C. • ESD protection exceeds 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which ex.

CD74HC373M : ordering information The ’HC373 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation. CD54HC373 F PACKAGE CD74HC373 E OR M PACKAGE (TOP VIEW) OE 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 LE When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines signific.

CD74HC373M96 : The CBT16211 provides 24 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as a dual 12-bit bus switch with separate output-enable (OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and a high-impedance state exists between the ports. The CBT16211 is characterized for operation from –40 to 85 °C. • ESD protection exceeds 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which ex.




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