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MT41J64M16LA-187E

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Part Number MT41J64M16LA-187E
Manufacturer Micon
Description DDR3 SDRAM
Published Dec 2, 2021
Detailed Description DDR3 SDRAM MT41J256M4 – 32 Meg x 4 x 8 Banks MT41J128M8 – 16 Meg x 8 x 8 Banks MT41J64M16 – 8 Meg x 16 x 8 Banks 1Gb: x...
Datasheet PDF File MT41J64M16LA-187E PDF File

MT41J64M16LA-187E
MT41J64M16LA-187E

Overview
DDR3 SDRAM MT41J256M4 – 32 Meg x 4 x 8 Banks MT41J128M8 – 16 Meg x 8 x 8 Banks MT41J64M16 – 8 Meg x 16 x 8 Banks 1Gb: x4, x8, x16 DDR3 SDRAM Features Features • VDD = VDDQ = +1.
5V ±0.
075V • 1.
5V center-terminated push/pull I/O • Differential bidirectional data strobe • 8n-bit prefetch architecture • Differential clock inputs (CK, CK#) • 8 internal banks • Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals • CAS (READ) latency (CL): 5, 6, 7, 8, 9, 10, or 11 • POSTED CAS ADDITIVE latency (AL): 0, CL - 1, CL - 2 • CAS (WRITE) latency (CWL): 5, 6, 7, 8, based on tCK • Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS]) • Selectable BC4 or BL8 on-the-fly (OTF) • Self refresh mode • TC of 0oC to 95oC – 64ms, 8,192 cycle refresh at 0oC to 85oC – 32ms at 85oC to 95oC • Clock frequency range of 300–800 MHz • Self refresh temperature (SRT) • Automatic self refresh (ASR) • Write leveling • Multipurpose register • Output driver calibration Options Marking • Configuration – 256 Meg x 4 – 128 Meg x 8 – 64 Meg x 16 • FBGA package (Pb-free) - x4, x8 – 78-ball FBGA (8mm x 11.
5mm) Rev.
F – 78-ball FBGA (9mm x 11.
5mm) Rev.
D – 86-ball FBGA (9mm x 15.
5mm) Rev.
B • FBGA package (Pb-free) - x16 – 96-ball FBGA (9mm x 15.
5mm) Rev.
B • Timing - cycle time – 1.
25ns @ CL = 11 (DDR3-1600) – 1.
25ns @ CL = 10 (DDR3-1600) – 1.
25ns @ CL = 9 (DDR3-1600) – 1.
5ns @ CL = 10 (DDR3-1333) – 1.
5ns @ CL = 9 (DDR3-1333) www.
DataSheet.
co.
kr – 1.
5ns @ CL = 8 (DDR3-1333) – 1.
87ns @ CL = 8 (DDR3-1066) – 1.
87ns @ CL = 7 (DDR3-1066) – 2.
5ns @ CL = 6 (DDR3-800) – 2.
5ns @ CL = 5 (DDR3-800) • Revision 256M4 128M8 64M16 JP HX BY LA -125 -125E -125F -15 -15E -15F -187 -187E -25 -25E :B/:D/:F Table 1: Key Timing Parameters Speed Grade -125 -125E -125F -15 -15E -15F -187 -187E -25 -25E Data Rate (MT/s) 1600 1600 1600 1333 1333 1333 1066 1066 800 800 Target tRCD-tRP-CL 11-11-11 10-10-10 9-9-9 10-10-10 9-9-9 8-8-8 8-8-8 7-7-7 6-6-6 5-5-5 tRCD (ns)...


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