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TSB41AB3

Texas Instruments
Part Number TSB41AB3
Manufacturer Texas Instruments
Description IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
Published Dec 25, 2022
Detailed Description TSB41AB3 IEEE 1394aĆ2000 THREEĆPORT CABLE TRANSCEIVER/ARBITER D Fully Supports Provisions of IEEE 1394-1995 Standard fo...
Datasheet PDF File TSB41AB3 PDF File

TSB41AB3
TSB41AB3

Overview
TSB41AB3 IEEE 1394aĆ2000 THREEĆPORT CABLE TRANSCEIVER/ARBITER D Fully Supports Provisions of IEEE 1394-1995 Standard for High Performance Serial Bus† and the 1394a-2000 Supplement D Fully Interoperable With FireWire and i.
LINK Implementation of IEEE Std 1394 D Fully Compliant With Open HCI Requirements D Provides Three 1394a-2000 Fully Compliant Cable Ports at 100/200/400 Megabits Per Second (Mbits/s) D Full 1394a-2000 Support Includes: Connection Debounce, Arbitrated Short Reset, Multispeed Concatenation, Arbitration Acceleration, Fly-By Concatenation, Port Disable/Suspend/Resume D Extended Resume Signaling for Compatibility With Legacy DV Devices D Power-Down Features to Conserve Energy in Battery Powered Applications Include: Automatic Device Power Down During Suspend, Device Power-Down Terminal, Link Interface Disable via LPS, and Inactive Ports Powered Down D Ultralow-Power Sleep Mode D Node Power Class Information Signaling for System Power Management D Cable Power Presence Monitoring D Cable Ports Monitor Line Conditions for Active Connection to Remote Node.
D Register Bits Provide Software Control of Contender Bit, Power Class Bits, Link Active Control Bit and 1394a-2000 Features.
SLLS418I − JUNE 2000 − REVISED DECEMBER 2004 D Data Interface to Link-Layer Controller Through 2/4/8 Parallel Lines at 49.
152 MHz D Interface to Link Layer Controller Supports Low-Cost TI Bus-Holder Isolation and Optional Annex J Electrical Isolation D Interoperable With Link-Layer Controllers Using 3.
3-V and 5-V Supplies D Interoperable With Other Physical Layers (PHYs) Using 3.
3-V and 5-V Supplies D Low-Cost 24.
576-MHz Crystal Provides Transmit Receive Data at 100/200/400 Mbits/s, and Link-Layer Controller Clock at 49.
152 MHz.
D Separate Cable Bias (TPBIAS) for Each Port D Single 3.
3-V Supply Operation D Low-Cost High Performance 80-Pin TQFP (PFP) Thermally Enhanced Package D Direct Drop-In Upgrade for TSB41LV03APFP and TSB41LV03PFP D Software Device Reset (SWR) D Fail-Safe C...


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