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IS61QDPB44M18C1

Part Number	IS61QDPB44M18C1
Manufacturer	ISSI
Description	72Mb QUADP SYNCHRONOUS SRAM
Published	Feb 18, 2024
Detailed Description	IS61QDPB44M18C/C1/C2 IS61QDPB42M36C/C1/C2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.5 Cycle Read Latency)...
Datasheet	IS61QDPB44M18C1 PDF File

Overview

IS61QDPB44M18C/C1/C2 IS61QDPB42M36C/C1/C2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.
5 Cycle Read Latency) APRIL 2019 FEATURES  2Mx36 and 4Mx18 configuration available.
 Separate independent read and write ports with concurrent read and write operations.
 Max.
567 MHz clock for high bandwidth  Double Data Rate (DDR) interface for read and write input ports.
 2.
5 cycle read latency.
 Fixed 4-bit burst for read and write operations.
 Clock stop support.
 Two input clocks (K and K#) for address and control registering at rising edges only.
DESCRIPTION The 72Mb IS61QDPB42M36C/C1/C2 and IS61QDPB44M18 C/C1/C2 are synchronous, high-performance CMOS static random access memo...

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