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HYB3165165BTL-50

Siemens Semiconductor Group
Part Number HYB3165165BTL-50
Manufacturer Siemens Semiconductor Group
Description 4M x 16-Bit Dynamic RAM
Published Mar 26, 2005
Detailed Description 4M x 16-Bit Dynamic RAM (8k, 4k & 2k Refresh, EDO-version) Preliminary Information • • • • HYB 3164165BT(L) -40/-50/-60...
Datasheet PDF File HYB3165165BTL-50 PDF File

HYB3165165BTL-50
HYB3165165BTL-50


Overview
4M x 16-Bit Dynamic RAM (8k, 4k & 2k Refresh, EDO-version) Preliminary Information • • • • HYB 3164165BT(L) -40/-50/-60 HYB 3165165BT(L) -40/-50/-60 HYB 3166165BT(L) -40/-50/-60 4 194 304 words by 16-bit organization 0 to 70 °C operating temperature Hyper Page Mode - EDO - operation Performance: -40 tRAC tCAC tAA tRC tHPC RAS access time CAS access time Access time from address Read/write cycle time Hyper page mode (EDO) cycle time 40 10 20 69 16 -50 50 13 25 84 20 -60 60 15 30 104 25 ns ns ns ns ns • • Single + 3.
3 V ( ± 0.
3V) power supply Low power dissipation: -40 HYB3166165BT(L) HYB3165165BT(L) HYB3164165BT(L) 864 486 306 -50 702 396 252 -60 558 324 216 mW mW mW • • • • • 7.
2 mW standby (TTL) 3.
6 mW standby (MOS) 720 µA standby for L-version Read, write, read-modify-write, CAS-before-RAS refresh (CBR), RAS-only refresh, hidden refresh and Self Refresh (L-version only 2 CAS / 1 WE byte control 8192 refresh cycles/128 ms , 13 R/ 9C addresses (HYB 3164165BT) 4096 refresh cycles/ 64 ms , 12 R/ 10C addresses (HYB 3165165BT) 2048 refresh cycles/ 32 ms , 11 R/ 11C addresses (HYB 3166165BT) 128 ms refresh period for L-versions Plastic Package: P-TSOPII-50 400 mil Semiconductor Group 1 12.
97 HYB3164(5/6)165BT(L)-40/-50/-60 4M x 16 EDO-DRAM This device is a 64 MBit dynamic RAM organized 4 194 304 x 16 bits.
The device is fabricated in an advanced first generation 64Mbit 0,35 µm CMOS silicon gate process technology.
The circuit and process design allow this device to achieve high performance and low power dissipation.
The HYB3164(5)165BT operates with a single 3.
3 +/-0.
3V power supply and interfaces with either LVTTL or LVCMOS levels.
Multiplexed address inputs permit the HYB3164(5/6)165BT to be packaged in 400mil wide TSOPII-50 package.
These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment.
The HYB3164(5/6)165BTL parts have a very low power „ sleep mode“supported by Self Refresh.
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