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HM1-6561B883

Intersil Corporation
Part Number HM1-6561B883
Manufacturer Intersil Corporation
Description 256 x 4 CMOS RAM
Published Mar 26, 2005
Detailed Description HM-6561/883 March 1997 256 x 4 CMOS RAM Description The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated using self-...
Datasheet PDF File HM1-6561B883 PDF File

HM1-6561B883
HM1-6561B883


Overview
HM-6561/883 March 1997 256 x 4 CMOS RAM Description The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology.
Synchronous circuit design techniques are employed to achieve high performance and low power operation.
On-chip latches are provided for address and data outputs allowing efficient interfacing with microprocessor systems.
The data output buffers can be forced to a high impedance state for use in expanded memory arrays.
The data inputs and outputs are multiplexed internally for common I/O bus compatibility.
The HM-6561/883 is a fully static RAM and may be maintained in any state for an indefinite period of time.
Data retention supply voltage and supply current are guaranteed over temperature.
Features • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.
2.
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• Low Power Standby .
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50µW Max • Low Power Operation .
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20mW/MHz Max • Fast Access Time.
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200ns Max • Data Retention .
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at 2.
0V Min • TTL Compatible Input/Output • High Output Drive - 1 TTL Load • On-Chip Address Registers • Common Data In/Out • Three-State Output • Easy Microprocessor Interfacing Ordering Information PACKAGE TEMPERATURE RANGE CERDIP -55oC to +125oC 220ns HM1-6561B/883 300ns HM1-6561/883 PKG.
NO.
F18.
3 Pinout HM-6561/883 (CERDIP) TOP VIEW A3 A2 A1 A0 A5 A6 A7 GND E 1 2 3 4 5 6 7 8 9 18 VCC 17 A4 16 W 15 S1 14 DQ3 13 DQ2 12 DQ1 11 DQ0 10 S2 PIN A E W S DQ DESCRIPTION Address Input Chip Enable Write Enable Chip Select Data In/Out CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.
intersil.
com or 407-727-9207 | Copyright © Intersil Corporation 1999 File Number 2990.
1 6-117 HM-6561/883 Functional Diagram A0 A1 A5 A6 A7 A LATCHED ADDRESS REGISTER 5 A 5 L G A D DQ0 A Q LATCH L ...



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