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HM5257805B-75

Part Number	HM5257805B-75
Manufacturer	Elpida Memory
Description	512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 16-bit 4-bank/16-Mword 8-bit 4-bank /32-Mword 4-bit 4-bank PC/133/ PC/100 SDRAM
Published	Mar 26, 2005
Detailed Description	HM5257165B-75/A6 HM5257805B-75/A6 HM5257405B-75/A6 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword × 16-bit × 4-bank/...
Datasheet	HM5257805B-75 PDF File

Overview

HM5257165B-75/A6 HM5257805B-75/A6 HM5257405B-75/A6 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword × 16-bit × 4-bank/16-Mword × 8-bit × 4-bank /32-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM E0081H10 (1st edition) (Previous ADE-203-1237A (Z)) Jan.
31, 2001 Description The HM5257165B is a 512-Mbit SDRAM organized as 8388608-word × 16-bit × 4 bank.
The HM5257805B is a 512-Mbit SDRAM organized as 16777216-word × 8-bit × 4 bank.
The HM5257405B is a 512-Mbit SDRAM organized as 33554432-word × 4-bit × 4 bank.
All inputs and outputs are referred to the rising edge of the clock input.
It is packaged in standard 54-pin plastic TSOP II.
Features • • • • • • • • 3.
3 V power supply Clock frequency: 133 MHz/100 MHz (max) LVTTL interface Single pulsed RAS 4 banks can operate simultaneously and independently Burst read/write operation and burst read/single write operation capability Programmable burst length: 1/2/4/8 2 variations of burst sequence  Sequential (BL = 1/2/4/8)  Interleave (BL = 1/2/4/8) Elpida Memory, Inc.
is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
HM5257165B/HM5257805B/HM5257405B-75/A6 • Programmable CAS latency: 2/3 • Byte control by DQM : DQM (HM5257805B/HM5257405B) : DQMU/DQML (HM5257165B) • Refresh cycles: 8192 refresh cycles/64 ms • 2 variations of refresh  Auto refresh  Self refresh • Temperature range: 0 to 60°C Ordering Information Type No.
HM5257165BTD-75* HM5257165BTD-A6 1 Frequency 133 MHz 100 MHz 133 MHz 100 MHz 133 MHz 100 MHz CAS latency 3 2/3 3 2/3 3 2/3 Package 400-mil 54-pin plastic TSOP II (TTP-54DA) HM5257805BTD-75* 1 HM5257805BTD-A6 HM5257405BTD-75* 1 HM5257405BTD-A6 Notes: 1.
100 MHz operation at CAS latency = 2 Data Sheet E0081H10 2 HM5257165B/HM5257805B/HM5257405B-75/A6 Pin Arrangement (HM5257165B) 54-pin TSOP VCC DQ0 VCCQ DQ1 DQ2 VSSQ DQ3 DQ4 VCCQ DQ5 DQ6 VSSQ DQ7 VCC DQML WE CAS RAS CS BA0 BA1 A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 (Top view) 54...

Similar Datasheet

HM5257805B-75 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 16-bit 4-bank/16-Mword 8-bit 4-bank /32-Mword 4-bit 4-bank PC/133/ PC/100 SDRAM - Elpida Memory
HM5257805B-A6 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 16-bit 4-bank/16-Mword 8-bit 4-bank /32-Mword 4-bit 4-bank PC/133/ PC/100 SDRAM - Elpida Memory

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