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CY3670

Cypress Semiconductor
Part Number CY3670
Manufacturer Cypress Semiconductor
Description Single-PLL General-Purpose EPROM Programmable Clock Generator
Published Mar 26, 2005
Detailed Description CY2071A Single-PLL General-Purpose EPROM Programmable Clock Generator Features Single phase-locked loop architecture EP...
Datasheet PDF File CY3670 PDF File

CY3670
CY3670

Overview
CY2071A Single-PLL General-Purpose EPROM Programmable Clock Generator Features Single phase-locked loop architecture EPROM programmability Benefits Generates a custom frequency from an external source Easy customization and fast turnaround Factory-programmable (CY2071A, CY2071AI) or field- Programming support available for all opportunities programmable (CY2071AF, CY2071AFI) device options Up to three configurable outputs Low-skew, low-jitter, high-accuracy outputs Internal loop filter Power management (OE) Frequency select options Configurable 5V or 3.
3V operation 8-pin 150-mil SOIC package i Generates three related frequencies from a single device Meets critical industry standard timing requirements Alleviates the need for external components Supports low-power applications 3 outputs with 2 user selectable frequencies Supports industry standard design platforms Industry-standard packaging saves on board space Selector Guide Part Number CY2071A CY2071AI CY2071AF CY2071AFI Outputs 3 3 3 3 Input Frequency Range 10 MHz–25 MHz (external crystal) 1 MHz–30 MHz (reference clock) 10 MHz–25 MHz (external crystal) 1 MHz–30 MHz (reference clock) 10 MHz–25 MHz (external crystal) 1 MHz–30 MHz (reference clock) 10 MHz–25 MHz (external crystal) 1 MHz–30 MHz (reference clock) Output Frequency Range 500 kHz–130 MHz (5V) 500 kHz–100 MHz (3.
3V) 500 kHz–100 MHz (5V) 500 kHz–80 MHz (3.
3V) 500 kHz–100 MHz (5V) 500 kHz–80 MHz (3.
3V) 500 kHz–90 MHz (5V) 500 kHz–66.
6 MHz (3.
3V) Specifics Factory Programmable Commercial Temperature Factory Programmable Industrial Temperature Field Programmable Commercial Temperature Field Programmable Industrial Temperature Logic Block Diagram for CY2071A XTALIN XTALOUT PLL Block REFERENCE OSCILLATOR CLKA EPROMConfigurable Multiplexer and Divide Logic CLKB CLKC OE / FS Pin Configuration 8-pin SOIC Top View CLKA GND XTALIN XTALOUT 1 2 3 4 8 7 6 5 OE/FS VDD CLKC CLKB Cypress Semiconductor Corporation Document #: 38-07139 Rev.
*A • 3901 North First...


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