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CY7C1011BV33

Cypress Semiconductor
Part Number CY7C1011BV33
Manufacturer Cypress Semiconductor
Description 128K x 16 Static RAM
Published Mar 27, 2005
Detailed Description CY7C1011BV33 128K x 16 Static RAM Features • 3.0 – 3.6V Operation • High speed — tAA = 12, 15 ns • CMOS for optimum spe...
Datasheet PDF File CY7C1011BV33 PDF File

CY7C1011BV33
CY7C1011BV33


Overview
CY7C1011BV33 128K x 16 Static RAM Features • 3.
0 – 3.
6V Operation • High speed — tAA = 12, 15 ns • CMOS for optimum speed/power • Low active power — 684 mW (Max.
) • Automatic power-down when deselected • Independent control of upper and lower bits • Available in 44-pin TSOP II (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A15).
If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH.
If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8.
If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O9 to I/O16.
See the truth table at the back of this data sheet for a complete description of read and write modes.
The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).
The CY7C1011BV33 is available in standard 44-pin TSOP Type II package.
Functional Description The CY7C1011BV33 is a high-performance CMOS static RAM organized as 131,072 words by 16 bits.
This device has an automatic power-down feature that significantly reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW.
If Byte Low Enable Logic Block Diagram DATA IN DRIVERS A7 A6 A5 A4 A3 A2 A1 A0 ROW DECODER 128K x 16 RAM Array 512 X 2048 SENSE AMPS I/O1–I/O8 I/O9–I/O16 COLUMN DECODER BHE WE CE OE BLE 1011B-1 Cypress Semiconductor Corporation Document #: 38-05021 Rev.
*A A8 A9 A10 A11 A12 A13 A14 A15 A16 • 3901 North First Stree...



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