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3256A

Part Number	3256A
Manufacturer	Lattice Semiconductor
Description	In-System Programmable High Density PLD
Published	Mar 30, 2005
Detailed Description	ispLSI 3256A ® In-System Programmable High Density PLD Features • HIGH-DENSITY PROGRAMMABLE LOGIC — 128 I/O Pins — 1100...
Datasheet	3256A PDF File

Overview

ispLSI 3256A ® In-System Programmable High Density PLD Features • HIGH-DENSITY PROGRAMMABLE LOGIC — 128 I/O Pins — 11000 PLD Gates — 384 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable — Non-Volatile — 100% Tested at Time of Manufacture — Unused Product Term Shutdown Saves Power • IN-SYSTEM PROGRAMMABLE — 5V In-System Programmable (ISP™) using Lattice ISP or Boundary Scan Test (IEEE 1149.
1) Protocol — Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality — Reprogram Soldered Devices for Faster Debugging • 100% IEEE 1149.
1 BOUNDARY SCAN COMPATIBLE • OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE...

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