DatasheetsPDF.com

DM54L95

Part Number	DM54L95
Manufacturer	National Semiconductor
Description	4-Bit Parallel Access Shift Registers
Published	Apr 1, 2005
Detailed Description	DM54L95 4-Bit Parallel Access Shift Registers June 1989 DM54L95 4-Bit Parallel Access Shift Registers General Descript...
Datasheet	DM54L95 PDF File

Overview

DM54L95 4-Bit Parallel Access Shift Registers June 1989 DM54L95 4-Bit Parallel Access Shift Registers General Description These 4-bit registers feature parallel and serial inputs parallel output mode control and two clock inputs The registers have three modes of operation Parallel (broadside) load Shift right (the direction QA toward QD) Shift left (the direction QD toward QA) Parallel loading is accomplished by applying the four bits of data and taking the mode control input high The data is loaded into the associated flip-flops and appears at the outputs after the high-to-low transition of the clock-2 input During loading the entry of serial data is inhibited Shift right is accomplished on the high-to-low transition of clock 1 when the mode control is low shift left is accomplished on the high-to-low transition of clock 2 when the mode control is high by connecting the output of each flipflop to the parallel input of the previous flip-flop (QD to input C etc ) and serial data is entered at input D The clock input may be applied simultaneously to clock 1 and clock 2 if both modes can be clocked from the same source Changes at the mode control input should normally be made while both clock inputs are low however conditions described in the last three lines of the truth table will also ensure that register contents are protected Features Y Y Typical maximum clock frequency 14 MHz Typical power dissipation mW Connection Diagram Dual-In-Line Package Order Number DM54L95J or DM54L95W See NS Package Number J14A or W14B TL F 6638 – 1 Function Table Inputs Mode Control H H H L L L Clocks 2 (L) H 1 (R) X X X H X X X X H L X X X X X Serial A X a QB X X X X X X X X Parallel B X b QC X X X X X X X X C X c QD X X X X X X X X D X d d X X X X X X X X QAO a QBn QAO H L QAO QAO QAO QAO QAO QBO b QCn QBO QAn QAn QBn QBO QBO QBO QBO QCO c QDn QCO QBn QBn QCO QCO QCO QCO QCO QDO d d QDO QCn QCn QDO QDO QDO QDO QDO QA Outputs QB QC QD v v L X X L L L H H u v v u u v v v L L ...

Similar Datasheet

DM54L00 Quad 2-Input NAND Gates - National Semiconductor
DM54L00 Quad 2-Input NAND Gates - National Semiconductor
DM54L02 Quad 2-Input NOR Gates - National Semiconductor
DM54L04 Hex Inverting Gate - National Semiconductor
DM54L10 Triple 3-Input NAND Gates - National Semiconductor
DM54L73 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs - National Semiconductor
DM54L74 Dual Positive Edge Triggered D Flip-Flop - National Semiconductor
DM54L89A 64-BIT READ/WRITE MEMORIES - ETC
DM54L93 Decade/ Divide-by-12/ and Binary Counters - National Semiconductor
DM54L95 4-Bit Parallel Access Shift Registers - National Semiconductor

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)