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4AJ11

Hitachi Semiconductor
Part Number 4AJ11
Manufacturer Hitachi Semiconductor
Description Silicon P-Channel Power MOS FET Array
Published Apr 1, 2005
Detailed Description 4AJ11 Silicon P-Channel Power MOS FET Array Application High speed power switching Features • Low on-resistance R DS(o...
Datasheet PDF File 4AJ11 PDF File

4AJ11
4AJ11


Overview
4AJ11 Silicon P-Channel Power MOS FET Array Application High speed power switching Features • Low on-resistance R DS(on) 0.
13 , VGS = –10 V, I D = –4 A R DS(on) 0.
17 , VGS = –4 V, I D = –4 A • Capable of 4 V gate drive • Low drive current • High speed switching • High density mounting • Suitable for motor driver and solenoid driver and lamp driver 4AJ11 Outline SP-12 12 1 G 2 D 5 G 4 D 8 G 9 D 12 G 11 D 34 56 78 9 10 1112 S 3 S 6 S 7 S 10 1, 5, 8, 12.
Gate 2, 4, 9, 11.
Drain 3, 6, 7, 10.
Source Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Channel dissipation Channel dissipation Channel temperature Storage temperature Notes: 1.
PW ≤ 10 µs, duty cycle ≤ 1% 2.
4 Devices operation Symbol VDSS VGSS ID I D(pulse)* I DR Pch (Tc = 25°C)* Pch* Tch Tstg 2 2 1 Ratings –60 ±20 –8 –32 –8 28 4 150 –55 to +150 Unit V V A A A W W °C °C 2 4AJ11 Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Symbol V(BR)DSS V(BR)GSS I GSS Min –60 ±20 — — –1.
0 — — Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage Body to drain diode reverse recovery time Note: 1.
Pulse Test |yfs| Ciss Coss Crss t d(on) tr t d(off) tf VDF t rr 5.
5 — — — — — — — — — Typ — — — — — 0.
09 0.
12 7.
7 1400 720 220 15 120 220 160 –1.
05 190 Max — — ±10 –250 –2.
0 0.
13 0.
17 — — — — — — — — — — Unit V V µA µA V Ω Ω S pF pF pF ns ns ns ns V µs I F = –8 A, VGS = 0 I F = –8 A, VGS = 0, dIF/dt = 50 A/µs Test conditions I D = –10 mA, VGS = 0 I G = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = –50 V, VGS = 0 I D = –1 mA, VDS = –10 V I D = –4 A VGS = –10 V*1 I D = –4 A VGS = –4 V*1 I D = –4 A VDS = –10 V*1 VDS = –10 V VGS = 0 f = 1 MHz I D = –8 A VGS = –10 V RL = 3.
75 Ω Zero gate ...


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