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74ACT521

Fairchild Semiconductor
Part Number 74ACT521
Manufacturer Fairchild Semiconductor
Description 8-Bit Identity Comparator
Published Apr 3, 2005
Detailed Description 74AC521 • 74ACT521 8-Bit Identity Comparator November 1988 Revised November 1999 74AC521 • 74ACT521 8-Bit Identity Com...
Datasheet PDF File 74ACT521 PDF File

74ACT521
74ACT521

Overview
74AC521 • 74ACT521 8-Bit Identity Comparator November 1988 Revised November 1999 74AC521 • 74ACT521 8-Bit Identity Comparator General Description The AC/ACT521 is an expandable 8-bit comparator.
It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit.
The expansion input IA = B also serves as an active LOW enable input.
Features s ICC reduced by 50% s Compares two 8-bit words in 6.
5 ns typ s Expandable to any word length s 20-pin package s Outputs source/sink 24 mA s ACT521 has TTL-compatible inputs Ordering Code: Order Number 74AC521SC 74AC521SJ 74AC521PC 74ACT521SC 74ACT521SJ 74ACT521PC Package Number M20B M20D N20A M20B M20D N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300” Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300” Wide Device also available in Tape and Reel.
Specify by appending suffix letter “X” to the ordering table.
Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names A0–A7 B0–B7 TA = B OA = B FACT is a trademark of Fairchild Semiconductor Corporation.
Description Word A Inputs Word B Inputs Expansion or Enable Input Identity Output © 1999 Fairchild Semiconductor Corporation DS009964 www.
fairchildsemi.
com 74AC521 • 74ACT521 Truth Table Inputs IA = B L L H H H = HIGH Voltage Level L = LOW Voltage Level Note 1: A0 = B0, A1 = B1, A2 = B2, etc.
Logic Diagram Outputs A, B A = B (Note 1) A≠Β A = B (Note 1) A≠Β OA = B L H H H Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Applications Ripple Expansion Parallel Expansion www.
fairchilds...


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