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74ALVC162835

Fairchild Semiconductor
Part Number 74ALVC162835
Manufacturer Fairchild Semiconductor
Description Low Voltage 18-Bit Universal Bus Driver
Published Apr 3, 2005
Detailed Description 74ALVC162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in Outpu...
Datasheet PDF File 74ALVC162835 PDF File

74ALVC162835
74ALVC162835

Overview
74ALVC162835 Low Voltage 18-Bit Universal Bus Driver with 3.
6V Tolerant Inputs/Outputs and 26Ω Series Resistors in Outputs September 2001 Revised February 2002 74ALVC162835 Low Voltage 18-Bit Universal Bus Driver with 3.
6V Tolerant Inputs/Outputs and 26Ω Series Resistors in Outputs General Description The ALVC162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes.
Data flow is controlled by output-enable (OE), latch-enable (LE), and clock (CLK) inputs.
The device operates in Transparent Mode when LE is held HIGH.
The device operates in clocked mode when LE is LOW and CLK is toggled.
Data transfers from the Inputs (In) to Outputs (On) on a Positive Edge Transition of the Clock.
When OE is LOW, the output data is enabled.
When OE is HIGH the output port is in a high impedance state.
The ALVC162835 is designed with 26Ω series resistors in the outputs.
This design reduces noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.
The 74ALVC162835 is designed for low voltage (1.
65V to 3.
6V) VCC applications with I/O capability up to 3.
6V.
The 74ALVC162835 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
Features s Compatible with PC100 DIMM module specifications s 1.
65V to 3.
6V VCC specifications provided s 3.
6V tolerant inputs and outputs s 26Ω series resistors in outputs s tPD (CLK to O n) 5.
4 ns max for 3.
0V to 3.
6V VCC 6.
3 ns max for 2.
3V to 2.
7V VCC 9.
2 ns max for 1.
65V to 1.
95V VCC s Power-off high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s Latchup conforms to JEDEC JED78 s ESD performance: Human body model > 2000V Machine model >200V Note 1: To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pulldown resistor; the minimum value of the resistor is determined by th...


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