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IDT54FCT163652A

Integrated Device Technology
Part Number IDT54FCT163652A
Manufacturer Integrated Device Technology
Description 3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS
Published Apr 3, 2005
Detailed Description ® Integrated Device Technology, Inc. 3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS IDT54/74FCT163652/A/C PRODUCT PREVIE...
Datasheet PDF File IDT54FCT163652A PDF File

IDT54FCT163652A
IDT54FCT163652A

Overview
® Integrated Device Technology, Inc.
3.
3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS IDT54/74FCT163652/A/C PRODUCT PREVIEW FEATURES: • 0.
5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Packages include 25 mil pitch SSOP, 19.
6 mil pitch TSSOP, 15.
7 mil pitch TVSOP and 25 mil pitch Cerpack • Extended commercial range of -40°C to +85°C • VCC = 3.
3V ±0.
3V, Normal Range or VCC = 2.
7 to 3.
6V, Extended Range • CMOS power levels (0.
4µW typ.
static) • Rail-to-Rail output swing for increased noise margin • Military product compliant to MIL-STD-883, Class B • Low Ground Bounce (0.
3V typ.
) • Inputs (except I/O) can be driven by 3.
3V or 5V components DESCRIPTION: The IDT54/74FCT163652/A/C 16-bit registered transceivers are built using advanced dual metal CMOS technology.
These high-speed, low-power devices are organized as two independent 8-bit bus transceivers with 3-state D-type registers.
For example, the xOEAB and xOEBA signals control the transceiver functions.
The xSAB and xSBA control pins are provided to select either real time or stored data transfer.
The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real time data.
A LOW input level selects real-time data and a HIGH level selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D-flip-flops by LOW-to-HIGH transitions at the appropriate clock pins (xCLKAB or xCLKBA), regardless of the select or enable control pins.
Flow-through organization of signal pins simplifies layout.
All inputs are designed with hysteresis for improved noise margin.
The IDT54/74FCT163652/A/C have series current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM 1OEAB 1O...


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