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ISB35130

STMicroelectronics
Part Number ISB35130
Manufacturer STMicroelectronics
Description HCMOS STRUCTURED ARRAY
Published Apr 7, 2005
Detailed Description ISB35000 SERIES HCMOS STRUCTURED ARRAY PRELIMINARY DATA FEATURES 0.5 micron triple layer metal HCMOS process featuring ...
Datasheet PDF File ISB35130 PDF File

ISB35130
ISB35130

Overview
ISB35000 SERIES HCMOS STRUCTURED ARRAY PRELIMINARY DATA FEATURES 0.
5 micron triple layer metal HCMOS process featuring retrograde well technology, low resistance salicided active areas, polysilicide gates and thin metal oxide.
3.
3 V optimized transistor with 5 V I/O interface capability 2 - input NAND delay of 0.
210 ns (typ) with fanout = 2.
Broad I/O functionality including LVCMOS, LVTTL, GTL, PECL, and LVDS.
High drive I/O; capability of sinking up to 48 mA with slew rate control, current spike suppression and impedance matching.
Metallised generators to support SPRAM and DPRAM, plus an extensive embedded function library.
Combines Standard Cell Features with Sea of Gates time to market.
Table 1.
Product range Internal Device Name ISB35083 ISB35130 ISB35166 ISB35208 ISB35279 ISB35389 ISB35484 ISB35666 ISB35832 Total Sites1 124,416 194,400 249,696 311,904 418,176 584,064 726,624 998,784 1,247,616 Estimated 2 Gates 82,944 129,600 166,464 207,936 278,784 389,376 484,416 665,856 831,744 F u l ly i n de p en d en t p o we r an d g roun d configurations for inputs, core and outputs.
Programmable I/O ring capability up to 1000 pads.
Output buffers capable of driving ISA, EISA, PCI, MCA, and SCSI interface levels.
Active pull up and pull down devices.
Buskeeper I/O functions.
Oscillators for wide frequency spectrum.
Broad range of 400 SSI cells.
300 element macrofunction library.
Design For Test includes LSSD macro library option and IEEE 1149.
1 JTAG Boundary Scan architecture built in.
Cadence and Mentor based design system with interfaces from multiple workstations.
Broad ceramic and plastic package range.
Latchup trigger current +/- 500 mA.
ESD protection +/- 4000 volts.
Total Usable3 Gates 58,060 90,720 116,524 145,555 195,148 253,094 314,870 399,513 499,046 Maximum4 Device Pads 188 232 260 288 332 388 432 504 560 Maximum5 I/O 172 216 244 272 316 372 416 488 544 Notes : 1.
Internal sites is based on the number of placement sites available to the route and place ...


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