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SC28L194

NXP
Part Number SC28L194
Manufacturer NXP
Description Quad UART for 3.3V and 5V supply voltage
Published Apr 8, 2005
Detailed Description INTEGRATED CIRCUITS SC28L194 Quad UART for 3.3V and 5V supply voltage Preliminary specification Supersedes data of 1995...
Datasheet PDF File SC28L194 PDF File

SC28L194
SC28L194

Overview
INTEGRATED CIRCUITS SC28L194 Quad UART for 3.
3V and 5V supply voltage Preliminary specification Supersedes data of 1995 Dec 14 IC19 Data Handbook 1998 Sep 21 Philips Semiconductors Philips Semiconductors Preliminary specification Quad UART for 3.
3V and 5V supply voltage SC28L194 DESCRIPTION The Philips 28L194 Quad UART is a single chip CMOS-LSI communications device that provides 4 full-duplex asynchronous channels with significantly deeper 16 byte FIFOs, Automatic in-band flow control using Xon/Xoff characters defined by the user and address recognition in the Wake-up mode.
Synchronous bus interface is used for all communication between host and QUART.
It is fabricated in Philips state of the art CMOS technology that combines the benefits of low cost, high density and low power consumption.
The operating speed of each receiver and transmitter can be selected independently from one of 22 fixed baud rates, a 16X clock derived from one of two programmable baud rate counters or one of three external 16X clocks (1 available at 1x clock rate).
The baud rate generator and counter can operate directly from a crystal or from seven other external or internal clock inputs.
The ability to independently program the operating speed of the receiver and transmitter makes the Quad UART particularly attractive for dual speed full duplex channel applications such as clustered terminal systems.
The receivers and transmitters are buffered with FIFOs of 16 characters to minimize the potential for receiver overrun and to reduce interrupt overhead.
In addition, a handshaking capability and in-band flow control are provided to disable a remote UART transmitter when the receiver buffer is full or nearly so.
To minimize interrupt overhead an interrupt arbitration system is included which reports the context of the interrupting UART via direct access or through the modification of the interrupt vector.
The context of the interrupt is reported as channel number, type of device interrupt...


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