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SAA7206H

NXP
Part Number SAA7206H
Manufacturer NXP
Description DVB compliant descrambler
Published Apr 8, 2005
Detailed Description INTEGRATED CIRCUITS DATA SHEET SAA7206H DVB compliant descrambler Product specification Supersedes data of 1996 Oct 02 ...
Datasheet PDF File SAA7206H PDF File

SAA7206H
SAA7206H

Overview
INTEGRATED CIRCUITS DATA SHEET SAA7206H DVB compliant descrambler Product specification Supersedes data of 1996 Oct 02 File under Integrated Circuits, IC02 1996 Oct 09 Philips Semiconductors Product specification DVB compliant descrambler CONTENTS 1 2 3 4 5 6 7 7.
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4 15 16 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION MPEG-2 systems parsing PES level descrambling Descrambler core Microcontroller interface Output interfacing Boundary scan test Programming the descrambler LIMITING VALUES HANDLING THERMAL CHARACTERISTICS DC CHARACTERISTICS AC CHARACTERISTICS PACKAGE OUTLINE SOLDERING Introduction Reflow soldering Wave soldering QFP SO Method (QFP and SO) Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS SAA7206H 1996 Oct 09 2 Philips Semiconductors Product specification DVB compliant descrambler 1 FEATURES SAA7206H • Descrambler, based on the super descrambler mechanism algorithm with stream decipher and block decipher.
The descrambler is initialized with a 64-bit Control Word (CW) at the beginning of a transport stream packet payload of a selected Packet Identification (PID).
The descrambler operates on transport stream packet or Packetized Elementary Stream (PES) packet payloads • Microcontroller support; only for control, no specific descrambling tasks are performed by the microcontroller.
However, parsing and processing of conditional access information (such as EMM and ECM data) is left to the system microcontroller • Boundary scan test port for boundary scan.
2 GENERAL DESCRIPTION • Input data fully compliant with the Transport Stream (TS) definition of the MPEG-2 systems specification • Input data signals; [Forward Error Correction (FEC) Interface] – modem data input bus (8-bit wide) – valid input data indicator – erroneous packet indicator – first packet byte indicator – byte strobe signa...


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