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XC95144

Xilinx
Part Number XC95144
Manufacturer Xilinx
Description XC95144 In-System Programmable CPLD
Published Apr 16, 2005
Detailed Description 1 ® XC95144 In-System Programmable CPLD 1 1* December 4, 1998 (Version 4.0) Product Specification Operating current ...
Datasheet PDF File XC95144 PDF File

XC95144
XC95144

Overview
1 ® XC95144 In-System Programmable CPLD 1 1* December 4, 1998 (Version 4.
0) Product Specification Operating current for each design can be approximated for specific operating conditions using the following equation: ICC (mA) = MCHP (1.
7) + MCLP (0.
9) + MC (0.
006 mA/MHz) f Where: MCHP = Macrocells in high-performance mode MCLP = Macrocells in low-power mode MC = Total number of macrocells used f = Clock frequency (MHz) Figure 1 shows a typical calculation for the XC95144 device.
Features • • • • • 7.
5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz 144 macrocells with 3,200 usable gates Up to 133 user I/O pins 5 V in-system programmable - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range Enhanced pin-locking architecture Flexible 36V18 Function Block - 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, output enables, set and reset signals Extensive IEEE Std 1149.
1 boundary-scan (JTAG) support Programmable power reduction mode in each macrocell Slew rate control on individual outputs User programmable ground pin capability Extended pattern security features for design protection High-drive 24 mA outputs 3.
3 V or 5 V I/O capability Advanced CMOS 5V FastFLASH technology Supports parallel programming of more than one XC9500 concurrently Available in 100-pin PQFP, 100-pin TQFP, and 160-pin PQFP packages • • • • • • • • • • • • 600 (480) Typical ICC (mA) 400 High Perf nce orma (320) (300) 200 (160) er Pow Low 0 Description The XC95144 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration.
It is comprised of eight 36V18 Function Blocks, providing 3,200 usable gates with propagation delays of 7.
5 ns.
See Figure 2 for the architecture overview.
50 Clock Frequency (MHz) 100 X5898B Figure 1: Typical Icc vs.
Frequency for XC95144 Power Management Power dissipation ...


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